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Searched refs:emask (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/regulator/
Dhi6421-regulator.c129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
145 .enable_mask = emask, \
169 ereg, emask, odelay, ecomask, ecoamp) \ argument
185 .enable_mask = emask, \
209 ereg, emask, odelay, ecomask, ecoamp) \ argument
225 .enable_mask = emask, \
245 #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ argument
262 .enable_mask = emask, \
282 #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
298 .enable_mask = emask, \
Dhi6421v530-regulator.c73 #define HI6421V530_LDO(_ID, v_table, vreg, vmask, ereg, emask, \ argument
88 .enable_mask = emask, \
Drn5t618-regulator.c25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ argument
38 .enable_mask = (emask), \
Dmt6360-regulator.c322 #define MT6360_REGULATOR_DESC(_name, _sname, ereg, emask, vreg, vmask, \ argument
339 .enable_mask = emask, \
/kernel/linux/linux-5.10/drivers/perf/
Dthunderx2_pmu.c369 u32 val, emask; in uncore_start_event_l3c() local
374 emask = tx2_pmu->events_mask; in uncore_start_event_l3c()
377 val = GET_EVENTID(event, emask) << 3; in uncore_start_event_l3c()
390 u32 val, cmask, emask; in uncore_start_event_dmc() local
397 emask = tx2_pmu->events_mask; in uncore_start_event_dmc()
400 event_id = GET_EVENTID(event, emask); in uncore_start_event_dmc()
432 u32 emask; in uncore_start_event_ccpi2() local
437 emask = tx2_pmu->events_mask; in uncore_start_event_ccpi2()
445 GET_EVENTID(event, emask)), hwc->config_base); in uncore_start_event_ccpi2()
470 u32 cmask, emask; in tx2_uncore_event_update() local
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/kernel/linux/linux-5.10/drivers/pinctrl/samsung/
Dpinctrl-s3c64xx.c117 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ argument
124 .eint_mask = emask, \
141 #define PIN_BANK_4BIT2_EINTW(pins, reg, id, eoffs, emask) \ argument
148 .eint_mask = emask, \
171 #define PIN_BANK_2BIT_EINTG(pins, reg, id, eoffs, emask) \ argument
178 .eint_mask = emask, \
Dpinctrl-s3c24xx.c70 #define PIN_BANK_2BIT_EINTW(pins, reg, id, eoffs, emask)\ argument
77 .eint_mask = emask, \
/kernel/linux/linux-5.10/arch/arm64/kernel/
Dinsn.c1573 u64 emask = BIT(tmp) - 1; in aarch64_encode_immediate() local
1575 if ((imm & emask) != ((imm >> tmp) & emask)) in aarch64_encode_immediate()
1579 mask = emask; in aarch64_encode_immediate()
/kernel/linux/linux-5.10/arch/x86/events/intel/
Dp4.c751 unsigned int v, emask; in p4_validate_raw_event() local
785 emask = p4_config_unpack_escr(event->attr.config) & P4_ESCR_EVENTMASK_MASK; in p4_validate_raw_event()
786 if (emask & ~p4_event_bind_map[v].escr_emask) in p4_validate_raw_event()
/kernel/linux/linux-5.10/fs/fscache/
Dobject.c70 #define TRANSIT_TO(state, emask) \ argument
71 { .events = (emask), .transit_to = STATE(state) }
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dintel_uncore.c1573 intel_engine_mask_t emask = INTEL_INFO(i915)->platform_engine_mask; in intel_uncore_fw_domains_init() local
1586 if (!__HAS_ENGINE(emask, _VCS(i))) in intel_uncore_fw_domains_init()
1594 if (!__HAS_ENGINE(emask, _VECS(i))) in intel_uncore_fw_domains_init()