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Searched refs:ethsys (Results 1 – 16 of 16) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,ethsys.txt1 Mediatek ethsys controller
4 The Mediatek ethsys controller provides various clocks to the system.
9 - "mediatek,mt2701-ethsys", "syscon"
10 - "mediatek,mt7622-ethsys", "syscon"
11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
12 - "mediatek,mt7629-ethsys", "syscon"
16 The ethsys controller uses the common clk binding from
22 ethsys: clock-controller@1b000000 {
23 compatible = "mediatek,mt2701-ethsys", "syscon";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmediatek-net.txt29 - resets: Should contain phandles to the ethsys reset signals
33 - mediatek,ethsys: phandle to the syscon node that handles the port setup
60 <&ethsys CLK_ETHSYS_ESW>,
61 <&ethsys CLK_ETHSYS_GP2>,
62 <&ethsys CLK_ETHSYS_GP1>;
68 resets = <&ethsys MT2701_ETHSYS_ETH_RST>;
70 mediatek,ethsys = <&ethsys>;
/kernel/linux/linux-5.10/drivers/net/ethernet/mediatek/
Dmtk_eth_path.c134 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac1_gmac2_to_sgmii_rgmii()
149 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac1_gmac2_to_sgmii_rgmii()
163 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac12_to_gephy_sgmii()
180 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac12_to_gephy_sgmii()
Dmtk_eth_soc.c157 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mt7621_gmac0_rgmii_adjust()
168 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
193 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mtk_gmac0_rgmii_adjust()
311 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
314 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
325 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
327 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
345 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
2380 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
2385 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
[all …]
Dmtk_eth_soc.h894 struct regmap *ethsys; member
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt7629.dtsi432 ethsys: syscon@1b000000 { label
433 compatible = "mediatek,mt7629-ethsys", "syscon";
447 <&ethsys CLK_ETH_ESW_EN>,
448 <&ethsys CLK_ETH_GP0_EN>,
449 <&ethsys CLK_ETH_GP1_EN>,
450 <&ethsys CLK_ETH_GP2_EN>,
451 <&ethsys CLK_ETH_FE_EN>,
473 mediatek,ethsys = <&ethsys>;
Dmt2701.dtsi720 ethsys: syscon@1b000000 { label
721 compatible = "mediatek,mt2701-ethsys", "syscon";
734 <&ethsys CLK_ETHSYS_ESW>,
735 <&ethsys CLK_ETHSYS_GP1>,
736 <&ethsys CLK_ETHSYS_GP2>,
739 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
740 <&ethsys MT2701_ETHSYS_GMAC_RST>,
741 <&ethsys MT2701_ETHSYS_PPE_RST>;
744 mediatek,ethsys = <&ethsys>;
Dmt7623.dtsi906 ethsys: syscon@1b000000 { label
907 compatible = "mediatek,mt7623-ethsys",
908 "mediatek,mt2701-ethsys",
919 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
934 <&ethsys CLK_ETHSYS_ESW>,
935 <&ethsys CLK_ETHSYS_GP1>,
936 <&ethsys CLK_ETHSYS_GP2>,
939 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
940 <&ethsys MT2701_ETHSYS_GMAC_RST>,
941 <&ethsys MT2701_ETHSYS_PPE_RST>;
[all …]
Dmt7623a-rfb-emmc.dts138 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
Dmt7623a-rfb-nand.dts142 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi896 ethsys: syscon@1b000000 { label
897 compatible = "mediatek,mt7622-ethsys",
908 clocks = <&ethsys CLK_ETH_HSDMA_EN>;
923 <&ethsys CLK_ETH_ESW_EN>,
924 <&ethsys CLK_ETH_GP0_EN>,
925 <&ethsys CLK_ETH_GP1_EN>,
926 <&ethsys CLK_ETH_GP2_EN>,
938 mediatek,ethsys = <&ethsys>;
/kernel/linux/linux-5.10/drivers/staging/mt7621-dts/
Dmt7621.dtsi390 ethsys: syscon@1e000000 { label
391 compatible = "mediatek,mt7621-ethsys",
413 mediatek,ethsys = <&ethsys>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dmediatek-crypto.txt22 clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dmtk-hsdma.txt27 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
/kernel/linux/linux-5.10/drivers/clk/mediatek/
DKconfig47 bool "Clock driver for MediaTek MT2701 ethsys"
50 This driver supports MediaTek MT2701 ethsys clocks.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dmt7530.txt29 line index for the ethsys.