| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | stb0899_algo.c | 50 struct stb0899_internal *internal = &state->internal;
55 return stb0899_calc_srate(internal->master_clk, sfr);
122 struct stb0899_internal *internal = &state->internal; in stb0899_carr_width() local
124 return (internal->srate + (internal->srate * internal->rolloff) / 100); in stb0899_carr_width()
133 struct stb0899_internal *internal = &state->internal; in stb0899_first_subrange() local
148 internal->sub_range = min(internal->srch_range, range); in stb0899_first_subrange()
150 internal->sub_range = 0; in stb0899_first_subrange()
152 internal->freq = params->freq; in stb0899_first_subrange()
153 internal->tuner_offst = 0L; in stb0899_first_subrange()
154 internal->sub_dir = 1; in stb0899_first_subrange()
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| D | stb0899_drv.c | 558 struct stb0899_internal *internal = &state->internal; in stb0899_set_mclk() local
566 internal->master_clk = stb0899_get_mclk(state); in stb0899_set_mclk()
568 dprintk(state->verbose, FE_DEBUG, 1, "MasterCLOCK=%d", internal->master_clk); in stb0899_set_mclk()
630 struct stb0899_internal *internal = &state->internal; in stb0899_init_calc() local
640 internal->t_agc1 = 0; in stb0899_init_calc()
641 internal->t_agc2 = 0; in stb0899_init_calc()
642 internal->master_clk = master_clk; in stb0899_init_calc()
643 internal->mclk = master_clk / 65536L; in stb0899_init_calc()
644 internal->rolloff = stb0899_get_alpha(state); in stb0899_init_calc()
648 internal->agc_gain = 8154; in stb0899_init_calc()
[all …]
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| D | stv090x.c | 35 struct stv090x_internal *internal; member
52 ((temp_dev->internal->i2c_adap != i2c_adap) || in find_dev()
53 (temp_dev->internal->i2c_addr != i2c_addr))) { in find_dev()
62 static void remove_dev(struct stv090x_internal *internal) in remove_dev() argument
65 struct stv090x_dev *del_dev = find_dev(internal->i2c_adap, in remove_dev()
66 internal->i2c_addr); in remove_dev()
83 static struct stv090x_dev *append_internal(struct stv090x_internal *internal) in append_internal() argument
90 new_dev->internal = internal; in append_internal()
768 mutex_lock(&state->internal->tuner_lock); in stv090x_i2c_gate_ctrl()
789 mutex_unlock(&state->internal->tuner_lock); in stv090x_i2c_gate_ctrl()
[all …]
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| D | stv0900_core.c | 29 struct stv0900_internal *internal; member
47 ((temp_chip->internal->i2c_adap != i2c_adap) || in find_inode()
48 (temp_chip->internal->i2c_addr != i2c_addr))) in find_inode()
58 static void remove_inode(struct stv0900_internal *internal) in remove_inode() argument
61 struct stv0900_inode *del_node = find_inode(internal->i2c_adap, in remove_inode()
62 internal->i2c_addr); in remove_inode()
83 static struct stv0900_inode *append_internal(struct stv0900_internal *internal) in append_internal() argument
103 new_node->internal = internal; in append_internal()
350 struct stv0900_internal *intp = state->internal; in stv0900_i2c_gate_ctrl()
642 struct stv0900_internal *internal = state->internal; in stv0900_read_signal_strength() local
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | basics.rst | 8 :internal:
14 :internal:
22 :internal:
28 :internal:
31 :internal:
34 :internal:
43 :internal:
52 :internal:
55 :internal:
64 :internal:
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| D | w1.rst | 7 W1 API internal to the kernel
16 :internal:
24 :internal:
37 W1 internal initialization for master devices.
40 :internal:
45 W1 internal initialization for master devices.
56 :internal:
67 :internal:
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| D | infiniband.rst | 14 :internal:
77 :internal:
90 :internal:
93 :internal:
99 :internal:
102 :internal:
105 :internal:
108 :internal:
114 :internal:
117 :internal:
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| D | infrastructure.rst | 8 :internal:
15 :internal:
30 :internal:
39 :internal:
57 :internal:
63 :internal:
78 :internal:
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| D | input.rst | 8 :internal:
23 :internal:
32 :internal:
41 :internal:
47 :internal:
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| /kernel/linux/linux-5.10/include/linux/ |
| D | average.h | 30 unsigned long internal; \
42 e->internal = 0; \
51 return e->internal >> (_precision); \
56 unsigned long internal = READ_ONCE(e->internal); \
65 WRITE_ONCE(e->internal, internal ? \
66 (((internal << weight_rcp) - internal) + \
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| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | kapi.rst | 12 :internal:
18 :internal:
21 :internal:
48 :internal:
102 :internal:
105 :internal:
123 :internal:
126 :internal:
135 :internal:
144 :internal:
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| /kernel/linux/linux-5.10/drivers/media/pci/cx23885/ |
| D | altera-ci.c | 111 struct fpga_internal *internal; member
119 struct fpga_internal *internal; member
132 struct fpga_internal *internal; member
151 (temp_chip->internal->dev != dev)) in find_inode()
183 if (temp_chip->internal != NULL) { in find_dinode()
184 temp_int = temp_chip->internal; in find_dinode()
198 static void remove_inode(struct fpga_internal *internal) in remove_inode() argument
201 struct fpga_inode *del_node = find_inode(internal->dev); in remove_inode()
222 static struct fpga_inode *append_internal(struct fpga_internal *internal) in append_internal() argument
242 new_node->internal = internal; in append_internal()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 244 static void rn_dump_clk_registers_internal(struct rn_clk_internal *internal, struct clk_mgr *clk_mg… in rn_dump_clk_registers_internal() argument
248 internal->CLK1_CLK3_CURRENT_CNT = REG_READ(CLK1_CLK3_CURRENT_CNT); in rn_dump_clk_registers_internal()
249 internal->CLK1_CLK3_BYPASS_CNTL = REG_READ(CLK1_CLK3_BYPASS_CNTL); in rn_dump_clk_registers_internal()
251 internal->CLK1_CLK3_DS_CNTL = REG_READ(CLK1_CLK3_DS_CNTL); //dcf deep sleep divider in rn_dump_clk_registers_internal()
252 internal->CLK1_CLK3_ALLOW_DS = REG_READ(CLK1_CLK3_ALLOW_DS); in rn_dump_clk_registers_internal()
254 internal->CLK1_CLK1_CURRENT_CNT = REG_READ(CLK1_CLK1_CURRENT_CNT); in rn_dump_clk_registers_internal()
255 internal->CLK1_CLK1_BYPASS_CNTL = REG_READ(CLK1_CLK1_BYPASS_CNTL); in rn_dump_clk_registers_internal()
257 internal->CLK1_CLK2_CURRENT_CNT = REG_READ(CLK1_CLK2_CURRENT_CNT); in rn_dump_clk_registers_internal()
258 internal->CLK1_CLK2_BYPASS_CNTL = REG_READ(CLK1_CLK2_BYPASS_CNTL); in rn_dump_clk_registers_internal()
260 internal->CLK1_CLK0_CURRENT_CNT = REG_READ(CLK1_CLK0_CURRENT_CNT); in rn_dump_clk_registers_internal()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | img,pistachio-internal-dac.txt | 1 Pistachio internal DAC DT bindings
5 - compatible: "img,pistachio-internal-dac"
8 node which contains the internal dac control registers
14 internal_dac: internal-dac {
15 compatible = "img,pistachio-internal-dac";
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| D | mvebu-audio.txt | 19 The first one is mandatory and defines the internal clock.
23 "internal" for the internal clock
33 clock-names = "internal";
|
| /kernel/linux/linux-5.10/Documentation/core-api/ |
| D | kernel-api.rst | 10 :internal:
46 :internal:
61 :internal:
64 :internal:
67 :internal:
88 :internal:
91 :internal:
151 :internal:
169 :internal:
190 :internal:
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| /kernel/linux/linux-5.10/fs/hpfs/ |
| D | anode.c | 26 if (le32_to_cpu(btree->u.internal[i].file_secno) > sec) { in hpfs_bplus_lookup()
27 a = le32_to_cpu(btree->u.internal[i].down); in hpfs_bplus_lookup()
87 a = le32_to_cpu(btree->u.internal[n].down); in hpfs_add_sector_to_btree()
88 btree->u.internal[n].file_secno = cpu_to_le32(-1); in hpfs_add_sector_to_btree()
141 btree->first_free = cpu_to_le16((char *)&(btree->u.internal[1]) - (char *)btree); in hpfs_add_sector_to_btree()
142 btree->u.internal[0].file_secno = cpu_to_le32(-1); in hpfs_add_sector_to_btree()
143 btree->u.internal[0].down = cpu_to_le32(na); in hpfs_add_sector_to_btree()
179 btree->u.internal[n].file_secno = cpu_to_le32(-1); in hpfs_add_sector_to_btree()
180 btree->u.internal[n].down = cpu_to_le32(na); in hpfs_add_sector_to_btree()
181 btree->u.internal[n-1].file_secno = cpu_to_le32(fs); in hpfs_add_sector_to_btree()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | renesas,drif.txt | 14 As per datasheet, each DRIF channel (drifn) is made up of two internal
15 channels (drifn0 & drifn1). These two internal channels share the common
16 CLK & SYNC. Each internal channel has its own dedicated resources like
17 irq, dma channels, address space & clock. This internal split is not
20 The device tree model represents each internal channel as a separate node.
21 The internal channels sharing the CLK & SYNC are tied together by their
24 internal channel.
26 When both internal channels are enabled they need to be managed together
29 properties of both the internal channels. This channel is identified by a
33 - When both the internal channels that are bonded together are enabled,
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| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | rapidio.rst | 46 :internal:
64 :internal:
70 :internal:
76 :internal:
79 :internal:
85 :internal:
91 :internal:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | cdns,xtensa-pic.txt | 8 When it's 1, the first cell is the internal IRQ number.
10 specifies whether it's internal (0) or external (1).
12 core variants it may be mapped to different internal IRQ.
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
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| /kernel/linux/linux-5.10/Documentation/gpu/ |
| D | drm-kms-helpers.rst | 7 userspace requests to kernel internal objects. Everything else is handled by a
43 :internal:
66 :internal:
90 :internal:
102 :internal:
159 :internal:
185 :internal:
215 :internal:
236 :internal:
257 :internal:
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| D | i915.rst | 23 :internal:
26 :internal:
50 :internal:
59 :internal:
89 :internal:
92 :internal:
101 :internal:
119 :internal:
136 :internal:
145 :internal:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | amlogic,meson-gx.txt | 19 "clkin0" - Parent clock of internal mux
20 "clkin1" - Other parent clock of internal mux
21 The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the
23 - resets : phandle of the internal reset line
26 - amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | qcom-emac.txt | 4 internal PHY. Each device is represented by a device tree node. A phandle
5 connects the MAC node to its corresponding internal phy node. Another
16 - internal-phy : phandle to the internal PHY node
46 internal-phy = <&emac_sgmii>;
95 internal-phy = <&emac_sgmii>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/ |
| D | ocelot.txt | 27 5 are fixed as internal ports in the NXP LS1028A instantiation.
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
49 * phy_mode = "internal": on ports 4 and 5
99 phy-mode = "internal";
110 phy-mode = "internal";
132 * phy_mode = "internal": on ports 8 and 9
192 phy-mode = "internal";
203 phy-mode = "internal";
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