/kernel/linux/linux-5.10/arch/arm/lib/ |
D | io-readsb.S | 39 orr r3, r3, r4, put_byte_1 41 orr r3, r3, r5, put_byte_2 43 orr r3, r3, r6, put_byte_3 47 orr r4, r4, r5, put_byte_1 49 orr r4, r4, r6, put_byte_2 51 orr r4, r4, ip, put_byte_3 55 orr r5, r5, r6, put_byte_1 57 orr r5, r5, ip, put_byte_2 59 orr r5, r5, lr, put_byte_3 62 orr r6, r6, ip, put_byte_1 [all …]
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D | io-writesw-armv3.S | 25 orr r3, r3, r3, lsl #16 44 orr ip, ip, ip, lsr #16 48 orr ip, ip, ip, lsl #16 52 orr ip, ip, ip, lsr #16 56 orr ip, ip, ip, lsl #16 60 orr ip, ip, ip, lsr #16 64 orr ip, ip, ip, lsl #16 68 orr ip, ip, ip, lsr #16 72 orr ip, ip, ip, lsl #16 87 orr ip, ip, ip, lsr #16 [all …]
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D | csumpartialcopygeneric.S | 177 orr r4, r4, r5, lspush #24 179 orr r5, r5, r6, lspush #24 181 orr r6, r6, r7, lspush #24 183 orr r7, r7, r8, lspush #24 198 orr r4, r4, r5, lspush #24 200 orr r5, r5, r6, lspush #24 208 orr r4, r4, r5, lspush #24 229 orr r4, r4, r5, lspush #16 231 orr r5, r5, r6, lspush #16 233 orr r6, r6, r7, lspush #16 [all …]
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D | io-readsw-armv3.S | 36 orr ip, ip, ip, lsl #8 45 orr r3, r3, r4, lsl #16 50 orr r4, r4, r5, lsl #16 55 orr r5, r5, r6, lsl #16 60 orr r6, r6, lr, lsl #16 76 orr r3, r3, r4, lsl #16 81 orr r4, r4, r5, lsl #16 91 orr r3, r3, r4, lsl #16
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D | memmove.S | 174 orr lr, lr, ip, lspull #\pull 176 orr ip, ip, r9, lspull #\pull 178 orr r9, r9, r8, lspull #\pull 180 orr r8, r8, r7, lspull #\pull 182 orr r7, r7, r6, lspull #\pull 184 orr r6, r6, r5, lspull #\pull 186 orr r5, r5, r4, lspull #\pull 188 orr r4, r4, r3, lspull #\pull 206 orr lr, lr, r3, lspull #\pull
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D | copy_template.S | 226 orr r3, r3, r4, lspush #\push 228 orr r4, r4, r5, lspush #\push 230 orr r5, r5, r6, lspush #\push 232 orr r6, r6, r7, lspush #\push 234 orr r7, r7, r8, lspush #\push 236 orr r8, r8, r9, lspush #\push 238 orr r9, r9, ip, lspush #\push 240 orr ip, ip, lr, lspush #\push 257 orr r3, r3, lr, lspush #\push
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/kernel/linux/linux-5.10/drivers/scsi/arm/ |
D | acornscsi-io.S | 25 orr lr, lr, #0xff00 31 orr r3, r3, r4, lsl #16 33 orr r4, r4, r6, lsl #16 36 orr r5, r5, r6, lsl #16 38 orr r6, r6, ip, lsl #16 47 orr r3, r3, r4, lsl #16 49 orr r4, r4, r6, lsl #16 58 orr r3, r3, r4, lsl #16 83 orr r3, r3, r3, lsr #16 85 orr r4, r4, r4, lsl #16 [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-omap1/ |
D | sleep.S | 78 orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000 79 orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00 83 orr r9, r7, #SELF_REFRESH_MODE & 0xff000000 84 orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff 89 orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff 94 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000 95 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00 100 orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00 105 orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00 153 orr r4, r4, #TCMIF_ASM_BASE & 0x00ff0000 [all …]
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D | sram.S | 26 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 27 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 30 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 31 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 37 orr r0, r0, #1 << 4 @ set lock bit again 44 orr r4, r4, #0x00ff
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/kernel/linux/linux-5.10/arch/arm/mach-at91/ |
D | pm_suspend.S | 177 orr tmp1, tmp1, #AT91_PMC_PRES_64 186 orr tmp1, tmp1, #AT91_PMC_KEY 199 orr tmp1, tmp1, #AT91_PMC_KEY 228 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN 230 orr tmp1, tmp1, #AT91_PMC_KEY 240 orr tmp1, tmp1, #AT91_PMC_MOSCEN 241 orr tmp1, tmp1, #AT91_PMC_KEY 264 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN 266 orr tmp1, tmp1, #AT91_PMC_KEY 278 orr tmp1, tmp1, #AT91_PMC_KEY [all …]
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/kernel/linux/linux-5.10/arch/arm64/lib/ |
D | strcmp.S | 69 orr tmp2, data1, #REP8_7f 72 orr syndrome, diff, has_nul 94 orr data1, data1, tmp2 95 orr data2, data2, tmp2 137 orr tmp2, data1, #REP8_7f 140 orr syndrome, diff, has_nul 159 orr tmp2, data1, #REP8_7f 162 orr syndrome, diff, has_nul 169 orr tmp2, data1, #REP8_7f 172 orr syndrome, diff, has_nul [all …]
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D | strncmp.S | 82 orr tmp2, data1, #REP8_7f 104 orr has_nul, has_nul, mask 107 orr syndrome, diff, has_nul 135 orr data1, data1, tmp2 136 orr data2, data2, tmp2 190 orr tmp2, data1, #REP8_7f 213 orr tmp2, data1, #REP8_7f 224 orr tmp2, data1, #REP8_7f 232 orr syndrome, diff, has_nul 259 CPU_BE( orr tmp2, tmp3, #REP8_7f ) [all …]
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D | strnlen.S | 75 orr tmp2, data1, #REP8_7f 77 orr tmp4, data2, #REP8_7f 81 orr tmp1, has_nul1, has_nul2 107 CPU_BE( orr tmp2, data2, #REP8_7f ) 149 orr data1, data1, tmp2 150 orr data2a, data2, tmp2
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D | strlen.S | 67 orr tmp2, data1, #REP8_7f 69 orr tmp4, data2, #REP8_7f 89 CPU_BE( orr tmp2, data2, #REP8_7f ) 109 orr data1, data1, tmp2 110 orr data2a, data2, tmp2
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/kernel/linux/linux-5.10/arch/arm/mm/ |
D | proc-v7-2level.S | 44 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) 45 ALT_UP(orr r0, r0, #TTB_FLAGS_UP) 78 orr r3, r3, r2 79 orr r3, r3, #PTE_EXT_AP0 | 2 146 ALT_SMP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_SMP) 147 ALT_UP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_UP) 148 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP) 149 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
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D | proc-v6.S | 100 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) 101 ALT_UP(orr r0, r0, #TTB_FLAGS_UP) 109 orr r1, r1, r2 @ insert into new context ID 162 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) 163 ALT_UP(orr r1, r1, #TTB_FLAGS_UP) 199 orr r0, r0, #0x20 211 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) 212 ALT_UP(orr r4, r4, #TTB_FLAGS_UP) 213 ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP) 214 ALT_UP(orr r8, r8, #TTB_FLAGS_UP) [all …]
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D | proc-v7-3level.S | 49 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd 121 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP) 122 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP) 123 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16) 124 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP << 16)
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D | proc-v7.S | 168 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) 169 ALT_UP(orr r1, r1, #TTB_FLAGS_UP) 295 orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode 298 orr r10, r10, r0 @ Set required bits 379 orr r10, r10, #1 << 12 @ set bit #12 384 orr r10, r10, #1 << 1 @ set bit #1 389 orr r10, r10, #1 << 24 @ set bit #24 394 orr r10, r10, #3 << 10 @ set bits #10 and #11 414 orr r10, r10, #3 << 10 @ set bits #10 and #11 446 orr r0, r0, #PJ4B_CLEAN_LINE [all …]
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/kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
D | sleep.S | 55 orr ip, ip, #DDR2_LPMODEN_BIT 59 orr ip, ip, #DDR2_MCLKSTOPEN_BIT 90 orr ip, ip, #PLLCTL_PLLPWRDN 95 orr ip, ip, #DEEPSLEEP_SLEEPENABLE_BIT 124 orr ip, ip, #PLLCTL_PLLRST 135 orr ip, ip, #PLLCTL_PLLEN 141 orr ip, ip, #PLLDIV_EN 180 orr ip, ip, r0 185 orr ip, ip, #0x1
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/kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
D | reset-handler.S | 51 orr r1, r1, \ 66 orr r1, r1, #1 156 orr r0, r0, #1 << 14 @ erratum 716044 159 orr r0, r0, #1 << 4 @ erratum 742230 160 orr r0, r0, #1 << 11 @ erratum 751472 172 orr r0, r0, #1 << 6 @ erratum 743622 173 orr r0, r0, #1 << 11 @ erratum 751472 266 orr r0, r0, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG 267 orr r0, r0, #FLOW_CTRL_CSR_ENABLE
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/kernel/linux/linux-5.10/arch/arm/mach-sunxi/ |
D | headsmp.S | 38 orr r1, r1, #(0x1 << 31) 44 orr r1, r1, #(0x1 << 26) 46 orr r1, r1, #(0x1<<3) 52 orr r1, r1, #(0x3 << 0)
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/kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
D | standby.S | 77 orr r0, r0, #PXA3_RCOMP_SWEVAL 84 orr r0, r0, #PXA3_DMCIER_EDLP 89 orr r0, r0, #PXA3_DDR_HCAL_HCEN | PXA3_DDR_HCAL_HCPROG 97 orr r0, r0, #PXA3_MDCNFG_DMCEN 104 orr r0, r0, #2 @ HCRNG
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/kernel/linux/linux-5.10/arch/arm/kernel/ |
D | sleep.S | 44 ARM( orr \dst, \dst, \mask, lsr \rs1 ) @ dst|=(aff1>>rs1) 46 THUMB( orr \dst, \dst, \mask ) 48 ARM( orr \dst, \dst, \mask, lsr \rs2 ) @ dst|=(aff2>>rs2) 50 THUMB( orr \dst, \dst, \mask )
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D | head-nommu.S | 170 orr r0, r0, #CR_A 235 orr \acr, \acr, \sr 277 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit 324 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit 346 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED) 347 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN) 360 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED) 361 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN) 384 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN) 385 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN) [all …]
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/kernel/liteos_a/arch/arm/arm/src/startup/ |
D | reset_vector_mp.S | 192 …orr r8, r4, #MMU_TTBRx_FLAGS /* r8 = r4 and set cacheable attributes on translation… 273 orr r12, r4, #MMU_TTBRx_FLAGS 280 … orr r12, r12, #(1 << 6) /* SMP, Enables coherent requests to the processor. */ 281 orr r12, r12, #(1 << 2) /* Enable D-side prefetch */ 282 orr r12, r12, #(1 << 11) /* Global BP Enable bit */ 287 orr r12, #(1 << 0) /* mmu enable */ 289 orr r12, #(1 << 2) /* D cache enable */ 290 orr r12, #(1 << 12) /* I cache enable */ 322 orr r8, r4, #MMU_TTBRx_FLAGS 382 orr r12, r9, r6, lsl #20 /* r12: flags | physAddr */
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