/kernel/linux/linux-5.10/drivers/net/phy/ |
D | intel-xway.c | 183 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, in xway_gphy_config_init() 187 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCL, in xway_gphy_config_init() 200 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0H, ledxh); in xway_gphy_config_init() 201 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0L, ledxl); in xway_gphy_config_init() 202 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1H, ledxh); in xway_gphy_config_init() 203 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1L, ledxl); in xway_gphy_config_init() 204 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh); in xway_gphy_config_init() 205 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl); in xway_gphy_config_init()
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D | dp83869.c | 238 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 244 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 250 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 262 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 268 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 273 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_set_wol() 298 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg); in dp83869_set_wol() 660 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, in dp83869_configure_mode() 695 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode() 707 ret = phy_write_mmd(phydev, DP83869_DEVADDR, in dp83869_configure_mode() [all …]
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D | dp83tc811.c | 113 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA1, in dp83811_set_wol() 115 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA2, in dp83811_set_wol() 117 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA3, in dp83811_set_wol() 128 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 131 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 134 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 148 return phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
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D | dp83867.c | 203 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD1, in dp83867_set_wol() 205 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD2, in dp83867_set_wol() 207 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD3, in dp83867_set_wol() 216 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1, in dp83867_set_wol() 218 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP2, in dp83867_set_wol() 220 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP3, in dp83867_set_wol() 242 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG, val_rxcfg); in dp83867_set_wol() 706 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val); in dp83867_config_init() 715 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL, in dp83867_config_init() 760 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL, val); in dp83867_config_init() [all …]
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D | dp83822.c | 153 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1, in dp83822_set_wol() 155 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2, in dp83822_set_wol() 157 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3, in dp83822_set_wol() 168 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 171 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 174 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 188 return phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 560 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value | in dp83822_resume()
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D | micrel.c | 396 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_config_init() 585 return phy_write_mmd(phydev, 2, reg, newval); in ksz9031_of_load_skew_values() 593 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, in ksz9031_center_flp_timing() 598 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, in ksz9031_center_flp_timing() 614 return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD, in ksz9031_enable_edpd() 652 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_CONTROL_PAD_SKEW, in ksz9031_config_rgmii_delay() 658 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_RX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay() 666 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_TX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay() 674 return phy_write_mmd(phydev, 2, MII_KSZ9031RN_CLK_PAD_SKEW, in ksz9031_config_rgmii_delay() 828 return phy_write_mmd(phydev, 2, reg, newval); in ksz9131_of_load_skew_values()
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D | aquantia_main.c | 271 err = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_MASK2, in aqr_config_intr() 276 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, in aqr_config_intr() 281 return phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, in aqr_config_intr()
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D | phy-c45.c | 70 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); in genphy_c45_pma_setup_forced() 74 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2); in genphy_c45_pma_setup_forced()
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D | aquantia_hwmon.c | 79 return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); in aqr_hwmon_set()
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D | adin.c | 260 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode() 287 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode()
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D | bcm-phy-lib.c | 343 phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val); in bcm_phy_set_eee() 362 phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val); in bcm_phy_set_eee()
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D | phy-core.c | 561 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) in phy_write_mmd() function 571 EXPORT_SYMBOL(phy_write_mmd);
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D | microchip.c | 313 phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG, in lan88xx_config_init()
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D | at803x.c | 264 phy_write_mmd(phydev, AT803X_DEVICE_ADDR, offsets[i], in at803x_set_wol() 544 return phy_write_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M, val); in at803x_clk_out_config()
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D | marvell10g.c | 200 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP, in mv3310_hwmon_config()
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D | phy.c | 1472 ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in phy_ethtool_set_eee()
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/kernel/linux/linux-5.10/drivers/net/ethernet/realtek/ |
D | r8169_phy_config.c | 659 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0000); in rtl8168e_1_hw_phy_config()
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D | r8169_main.c | 1941 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in rtl_enable_eee()
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/kernel/linux/linux-5.10/drivers/net/usb/ |
D | lan78xx.c | 1979 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf); in lan8835_fixup() 1999 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077); in ksz9031rnx_fixup() 2001 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777); in ksz9031rnx_fixup() 2003 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF); in ksz9031rnx_fixup()
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/kernel/linux/linux-5.10/include/linux/ |
D | phy.h | 1066 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
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