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Searched refs:pll_clk (Results 1 – 25 of 44) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clk/axs10x/
Dpll_clock.c223 struct axs10x_pll_clk *pll_clk; in axs10x_pll_clk_probe() local
227 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in axs10x_pll_clk_probe()
228 if (!pll_clk) in axs10x_pll_clk_probe()
231 pll_clk->base = devm_platform_ioremap_resource(pdev, 0); in axs10x_pll_clk_probe()
232 if (IS_ERR(pll_clk->base)) in axs10x_pll_clk_probe()
233 return PTR_ERR(pll_clk->base); in axs10x_pll_clk_probe()
235 pll_clk->lock = devm_platform_ioremap_resource(pdev, 1); in axs10x_pll_clk_probe()
236 if (IS_ERR(pll_clk->lock)) in axs10x_pll_clk_probe()
237 return PTR_ERR(pll_clk->lock); in axs10x_pll_clk_probe()
244 pll_clk->hw.init = &init; in axs10x_pll_clk_probe()
[all …]
Di2s_pll_clock.c173 struct i2s_pll_clk *pll_clk; in i2s_pll_clk_probe() local
176 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in i2s_pll_clk_probe()
177 if (!pll_clk) in i2s_pll_clk_probe()
180 pll_clk->base = devm_platform_ioremap_resource(pdev, 0); in i2s_pll_clk_probe()
181 if (IS_ERR(pll_clk->base)) in i2s_pll_clk_probe()
182 return PTR_ERR(pll_clk->base); in i2s_pll_clk_probe()
191 pll_clk->hw.init = &init; in i2s_pll_clk_probe()
192 pll_clk->dev = dev; in i2s_pll_clk_probe()
194 clk = devm_clk_register(dev, &pll_clk->hw); in i2s_pll_clk_probe()
/kernel/linux/linux-5.10/drivers/clk/
Dclk-hsdk-pll.c313 struct hsdk_pll_clk *pll_clk; in hsdk_pll_clk_probe() local
317 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in hsdk_pll_clk_probe()
318 if (!pll_clk) in hsdk_pll_clk_probe()
322 pll_clk->regs = devm_ioremap_resource(dev, mem); in hsdk_pll_clk_probe()
323 if (IS_ERR(pll_clk->regs)) in hsdk_pll_clk_probe()
324 return PTR_ERR(pll_clk->regs); in hsdk_pll_clk_probe()
337 pll_clk->hw.init = &init; in hsdk_pll_clk_probe()
338 pll_clk->dev = dev; in hsdk_pll_clk_probe()
339 pll_clk->pll_devdata = of_device_get_match_data(dev); in hsdk_pll_clk_probe()
341 if (!pll_clk->pll_devdata) { in hsdk_pll_clk_probe()
[all …]
Dclk-moxart.c62 struct clk *pll_clk; in moxart_of_apb_clk_init() local
84 pll_clk = of_clk_get(node, 0); in moxart_of_apb_clk_init()
85 if (IS_ERR(pll_clk)) { in moxart_of_apb_clk_init()
Dclk-vt8500.c677 struct clk_pll *pll_clk; in vtwm_pll_clk_init() local
690 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in vtwm_pll_clk_init()
691 if (WARN_ON(!pll_clk)) in vtwm_pll_clk_init()
694 pll_clk->reg = pmc_base + reg; in vtwm_pll_clk_init()
695 pll_clk->lock = &_lock; in vtwm_pll_clk_init()
696 pll_clk->type = pll_type; in vtwm_pll_clk_init()
707 pll_clk->hw.init = &init; in vtwm_pll_clk_init()
709 hw = &pll_clk->hw; in vtwm_pll_clk_init()
710 rc = clk_hw_register(NULL, &pll_clk->hw); in vtwm_pll_clk_init()
712 kfree(pll_clk); in vtwm_pll_clk_init()
/kernel/linux/linux-5.10/drivers/clk/socfpga/
Dclk-pll-s10.c148 struct socfpga_pll *pll_clk; in s10_register_pll() local
152 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in s10_register_pll()
153 if (WARN_ON(!pll_clk)) in s10_register_pll()
156 pll_clk->hw.reg = reg + clks->offset; in s10_register_pll()
169 pll_clk->hw.hw.init = &init; in s10_register_pll()
171 pll_clk->hw.bit_idx = SOCFPGA_PLL_POWER; in s10_register_pll()
173 clk = clk_register(NULL, &pll_clk->hw.hw); in s10_register_pll()
175 kfree(pll_clk); in s10_register_pll()
185 struct socfpga_pll *pll_clk; in agilex_register_pll() local
189 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in agilex_register_pll()
[all …]
Dclk-pll-a10.c71 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
81 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
82 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
89 pll_clk->hw.reg = clk_mgr_a10_base_addr + reg; in __socfpga_pll_init()
102 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
104 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
106 clk = clk_register(NULL, &pll_clk->hw.hw); in __socfpga_pll_init()
108 kfree(pll_clk); in __socfpga_pll_init()
Dclk-pll.c78 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
88 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
89 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
96 pll_clk->hw.reg = clk_mgr_base_addr + reg; in __socfpga_pll_init()
106 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
108 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
110 hw_clk = &pll_clk->hw.hw; in __socfpga_pll_init()
114 kfree(pll_clk); in __socfpga_pll_init()
/kernel/linux/linux-5.10/drivers/spi/
Dspi-bcm63xx-hsspi.c106 struct clk *pll_clk; member
342 struct clk *clk, *pll_clk = NULL; in bcm63xx_hsspi_probe() local
376 pll_clk = devm_clk_get(dev, "pll"); in bcm63xx_hsspi_probe()
378 if (IS_ERR(pll_clk)) { in bcm63xx_hsspi_probe()
379 ret = PTR_ERR(pll_clk); in bcm63xx_hsspi_probe()
383 ret = clk_prepare_enable(pll_clk); in bcm63xx_hsspi_probe()
387 rate = clk_get_rate(pll_clk); in bcm63xx_hsspi_probe()
403 bs->pll_clk = pll_clk; in bcm63xx_hsspi_probe()
463 clk_disable_unprepare(pll_clk); in bcm63xx_hsspi_probe()
477 clk_disable_unprepare(bs->pll_clk); in bcm63xx_hsspi_remove()
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
Dclock-sh7269.c47 static struct clk pll_clk = { variable
64 .parent = &pll_clk,
79 .parent = &pll_clk,
86 &pll_clk,
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
142 CLKDEV_CON_ID("pll_clk", &pll_clk),
Dclock-sh7264.c51 static struct clk pll_clk = { variable
60 &pll_clk,
78 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
108 CLKDEV_CON_ID("pll_clk", &pll_clk),
/kernel/linux/linux-5.10/drivers/soc/xilinx/
Dxlnx_vcu.c298 u32 clkoutdiv, vcu_pll_ctrl, pll_clk; in xvcu_set_vcu_pll_info() local
348 pll_clk = fvco / VCU_PLL_DIV2; in xvcu_set_vcu_pll_info()
350 pll_clk++; in xvcu_set_vcu_pll_info()
351 mod = pll_clk % coreclk; in xvcu_set_vcu_pll_info()
353 divisor_core = pll_clk / coreclk; in xvcu_set_vcu_pll_info()
355 divisor_core = pll_clk / coreclk; in xvcu_set_vcu_pll_info()
363 divisor_mcu = pll_clk / mcuclk; in xvcu_set_vcu_pll_info()
364 mod = pll_clk % mcuclk; in xvcu_set_vcu_pll_info()
377 xvcu->coreclk = pll_clk / divisor_core; in xvcu_set_vcu_pll_info()
378 mcuclk = pll_clk / divisor_mcu; in xvcu_set_vcu_pll_info()
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dclock-sh7722.c82 static struct clk pll_clk = { variable
91 &pll_clk,
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
138 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
174 CLKDEV_CON_ID("pll_clk", &pll_clk),
226 pll_clk.parent = &dll_clk; in arch_clk_init()
228 pll_clk.parent = &extal_clk; in arch_clk_init()
Dclock-sh7366.c79 static struct clk pll_clk = { variable
88 &pll_clk,
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
125 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
188 CLKDEV_CON_ID("pll_clk", &pll_clk),
251 pll_clk.parent = &dll_clk; in arch_clk_init()
253 pll_clk.parent = &extal_clk; in arch_clk_init()
Dclock-sh7757.c37 static struct clk pll_clk = { variable
45 &pll_clk,
63 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
105 CLKDEV_CON_ID("pll_clk", &pll_clk),
Dclock-shx3.c36 static struct clk pll_clk = { variable
44 &pll_clk,
62 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
103 CLKDEV_CON_ID("pll_clk", &pll_clk),
Dclock-sh7343.c76 static struct clk pll_clk = { variable
85 &pll_clk,
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
122 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
190 CLKDEV_CON_ID("pll_clk", &pll_clk),
258 pll_clk.parent = &dll_clk; in arch_clk_init()
260 pll_clk.parent = &extal_clk; in arch_clk_init()
Dclock-sh7723.c83 static struct clk pll_clk = { variable
92 &pll_clk,
112 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
138 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
199 CLKDEV_CON_ID("pll_clk", &pll_clk),
274 pll_clk.parent = &dll_clk; in arch_clk_init()
276 pll_clk.parent = &extal_clk; in arch_clk_init()
Dclock-sh7785.c40 static struct clk pll_clk = { variable
48 &pll_clk,
67 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
119 CLKDEV_CON_ID("pll_clk", &pll_clk),
Dclock-sh7724.c85 static struct clk pll_clk = { variable
102 .parent = &pll_clk,
119 &pll_clk,
151 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
264 CLKDEV_CON_ID("pll_clk", &pll_clk),
348 pll_clk.parent = &fll_clk; in arch_clk_init()
350 pll_clk.parent = &extal_clk; in arch_clk_init()
Dclock-sh7786.c42 static struct clk pll_clk = { variable
50 &pll_clk,
68 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
128 CLKDEV_CON_ID("pll_clk", &pll_clk),
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-pll14xx.c387 const struct imx_pll14xx_clk *pll_clk) in imx_dev_clk_hw_pll14xx() argument
400 init.flags = pll_clk->flags; in imx_dev_clk_hw_pll14xx()
404 switch (pll_clk->type) { in imx_dev_clk_hw_pll14xx()
406 if (!pll_clk->rate_table) in imx_dev_clk_hw_pll14xx()
423 pll->type = pll_clk->type; in imx_dev_clk_hw_pll14xx()
424 pll->rate_table = pll_clk->rate_table; in imx_dev_clk_hw_pll14xx()
425 pll->rate_count = pll_clk->rate_count; in imx_dev_clk_hw_pll14xx()
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-pll.c1250 const struct samsung_pll_clock *pll_clk, in _samsung_clk_register_pll() argument
1260 __func__, pll_clk->name); in _samsung_clk_register_pll()
1264 init.name = pll_clk->name; in _samsung_clk_register_pll()
1265 init.flags = pll_clk->flags; in _samsung_clk_register_pll()
1266 init.parent_names = &pll_clk->parent_name; in _samsung_clk_register_pll()
1269 if (pll_clk->rate_table) { in _samsung_clk_register_pll()
1271 for (len = 0; pll_clk->rate_table[len].rate != 0; ) in _samsung_clk_register_pll()
1275 pll->rate_table = kmemdup(pll_clk->rate_table, in _samsung_clk_register_pll()
1281 __func__, pll_clk->name); in _samsung_clk_register_pll()
1284 switch (pll_clk->type) { in _samsung_clk_register_pll()
[all …]
/kernel/linux/linux-5.10/drivers/clk/ti/
Dfapll.c497 struct clk *pll_clk) in ti_fapll_synth_setup() argument
522 synth->clk_pll = pll_clk; in ti_fapll_synth_setup()
544 struct clk *pll_clk; in ti_fapll_setup() local
598 pll_clk = clk_register(NULL, &fd->hw); in ti_fapll_setup()
599 if (IS_ERR(pll_clk)) in ti_fapll_setup()
602 fd->outputs.clks[0] = pll_clk; in ti_fapll_setup()
642 pll_clk); in ti_fapll_setup()
/kernel/linux/linux-5.10/drivers/cpufreq/
Dloongson1-cpufreq.c28 struct clk *pll_clk; /* PLL clk */ member
86 pll_freq = clk_get_rate(cpufreq->pll_clk) / 1000; in ls1x_cpufreq_init()
177 cpufreq->pll_clk = clk; in ls1x_cpufreq_probe()

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