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/kernel/linux/linux-5.10/arch/microblaze/lib/
Dfastcopy.S83 lwi r12, r6, 12 /* t4 = *(s + 12) */
87 swi r12, r5, 12 /* *(d + 12) = t4 */
91 lwi r12, r6, 28 /* t4 = *(s + 28) */
95 swi r12, r5, 28 /* *(d + 28) = t4 */
115 lwi r12, r8, 4 /* v = *(as + 4) */
116 bsrli r9, r12, 8 /* t1 = v >> 8 */
119 bslli r11, r12, 24 /* h = v << 24 */
120 lwi r12, r8, 8 /* v = *(as + 8) */
121 bsrli r9, r12, 8 /* t1 = v >> 8 */
124 bslli r11, r12, 24 /* h = v << 24 */
[all …]
/kernel/linux/linux-5.10/arch/arc/lib/
Dstrchr-700.S31 sub r12,r2,r7
32 bic_s r12,r12,r2
33 and r12,r12,r4
34 brne.d r12,0,.Lfound0_ua
37 sub r12,r6,r7
38 bic r12,r12,r6
40 and r7,r12,r4
44 and r12,r12,r4
45 breq r12,0,.Loop ; For speed, we want this branch to be unaligned.
46 lsr_s r12,r12,7
[all …]
Dstrlen.S22 sub r12,r6,r7
23 bic r12,r12,r6
24 or.eq r12,r12,r1
25 and r12,r12,r5
26 brne r12,0,.Learly_end
35 sub r12,r6,r4
36 bic r12,r12,r6
37 bmsk.ne r12,r12,r7
38 or.eq r12,r12,r1
39 and r12,r12,r5
[all …]
Dmemcpy-700.S14 ld_s r12,[r1,0]
18 st.ab r12,[r5,4]
19 ld.a r12,[r1,4]
23 st.ab r12,[r5,4]
24 ld.a r12,[r1,8]
32 xor_s r12,r12,r3
33 bmsk r12,r12,r2
34 xor_s r12,r12,r3
38 xor_s r3,r3,r12
40 xor_s r12,r12,r3
[all …]
Dmemcmp.S17 or r12,r0,r1
18 asl_s r12,r12,30
20 brls r2,r12,.Lbytewise
31 mov_s r12,WORD2
33 brne WORD2,r12,.Lodd
39 ld_s r12,[r1,4]
45 brne WORD2,r12,.Lodd
47 brne WORD2,r12,.Lodd
75 asl r12,r5,r1
77 lsr_s r12,r12,1
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dexception-64e.h88 mtspr SPRN_SPRG_TLB_SCRATCH,r12; \
89 mfspr r12,SPRN_SPRG_TLB_EXFRAME; \
90 std r10,EX_TLB_R10(r12); \
92 std r11,EX_TLB_R11(r12); \
94 std r13,EX_TLB_R13(r12); \
96 std r14,EX_TLB_R14(r12); \
97 addi r14,r12,EX_TLB_SIZE; \
98 std r15,EX_TLB_R15(r12); \
100 std r16,EX_TLB_R16(r12); \
102 std r10,EX_TLB_CR(r12); \
[all …]
/kernel/linux/linux-5.10/arch/powerpc/platforms/pseries/
DhvCall.S91 ld r12,hcall_tracepoint_refcount@toc(r2); \
92 std r12,32(r1); \
93 cmpdi r12,0; \
156 ld r12,STK_PARAM(R4)(r1)
157 std r4, 0(r12)
158 std r5, 8(r12)
159 std r6, 16(r12)
160 std r7, 24(r12)
183 ld r12,STK_PARAM(R4)(r1)
184 std r4,0(r12)
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kvm/
Dbook3s_rmhandlers.S58 mtspr SPRN_SPRG_SCRATCH1, r12 /* Save r12 */
59 mfcr r12
62 2: mtcr r12
63 mfspr r12, SPRN_SPRG_SCRATCH1
68 stw r12, HSTATE_SCRATCH1(r13)
69 mfspr r12, SPRN_SPRG_SCRATCH1
70 stw r12, HSTATE_SCRATCH0(r13)
71 lbz r12, HSTATE_IN_GUEST(r13)
72 cmpwi r12, KVM_GUEST_MODE_NONE
75 lwz r12, HSTATE_SCRATCH1(r13)
[all …]
/kernel/liteos_a/arch/arm/arm/src/startup/
Dreset_vector_mp.S148 mrc p15, 0, r12, c0, c0, 5 /* r12: get cpuid */
149 and r12, r12, #MPIDR_CPUID_MASK
150 cmp r12, #0
156 … subs r12, r4, r5 /* r12: delta of load address and physical address */
170 sub pc, r12
172 sub r11, r11, r12 /* r11: eventual address offset */
203 add r12, r10, r6, lsl #20 /* r12: pa |flags */
204 str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[paIndex] = pt entry */
206 str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[vaIndex] = pt entry */
227 mrc p15, 0, r12, c0, c0, 5
[all …]
Dreset_vector_up.S131 … subs r12, r4, r5 /* r12: delta of load address and physical address */
145 sub pc, r12
147 sub r11, r11, r12 /* r11: eventual address offset */
178 add r12, r10, r6, lsl #20 /* r12: pa |flags */
179 str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[paIndex] = pt entry */
181 str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[vaIndex] = pt entry */
257 mov r12, #0
258 …mcr p15, 0, r12, c8, c7, 0 /* Set c8 to control the TLB and set the mapping to in…
261 mcr p15, 0, r12, c2, c0, 2 /* Initialize the c2 register */
264 orr r12, r4, #MMU_TTBRx_FLAGS
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap-smc.S26 stmfd sp!, {r2-r12, lr}
27 mov r12, r0
31 ldmfd sp!, {r2-r12, pc}
43 stmfd sp!, {r4-r12, lr}
48 mov r12, #0x00 @ Secure Service ID
54 ldmfd sp!, {r4-r12, pc}
67 mov r12, r0 @ Copy the secure service ID
75 stmfd sp!, {r1-r12, lr}
76 ldr r12, =0x104
79 ldmfd sp!, {r1-r12, pc}
[all …]
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
Dlos_dispatch.S45 push {r12, lr}
47 pop {r12, lr}
68 ldr r12, [r0]
70 ldr r2, [r12, #4]
75 add r12, r12, #108
76 ldmfd r12!, {r0-r7}
77 add r12, r12, #72
78 msr psp, r12
87 add r12, r12, #44
89 ldmfd r12!, {r0-r7}
[all …]
/kernel/linux/linux-5.10/arch/powerpc/lib/
Dcrtsavres.S443 li r12,-192
444 stvx v20,r12,r0
447 li r12,-176
448 stvx v21,r12,r0
451 li r12,-160
452 stvx v22,r12,r0
455 li r12,-144
456 stvx v23,r12,r0
459 li r12,-128
460 stvx v24,r12,r0
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dhead_44x.S310 mtspr SPRN_SPRG_WSCRATCH2, r12
325 mfspr r12,SPRN_MMUCR
326 rlwinm r12,r12,0,0,23 /* Clear TID */
336 mfspr r12,SPRN_MMUCR
338 rlwimi r12,r13,0,24,31 /* Set TID */
341 mtspr SPRN_MMUCR,r12
356 mfspr r12,SPRN_ESR
358 rlwimi r13,r12,10,30,30
362 rlwinm r12, r10, PPC44x_PGD_OFF_SHIFT, PPC44x_PGD_OFF_MASK_BIT, 29
363 lwzx r11, r12, r11 /* Get pgd/pmd entry */
[all …]
Dhead_32.h83 stw r12,GPR12(r11)
90 mfspr r12,SPRN_SPRG_SCRATCH1
91 stw r12,GPR11(r11)
95 mfspr r12, SPRN_SPRG_THREAD
96 tovirt(r12, r12)
98 lwz r10, DAR(r12)
100 lwz r10, DSISR(r12)
103 lwz r9, SRR1(r12)
105 lwz r12, SRR0(r12)
107 mfspr r12,SPRN_SRR0
[all …]
Dhead_booke.h64 stw r12,GPR12(r11); \
68 lwz r12, THREAD_NORMSAVE(0)(r10); \
69 stw r12,GPR11(r11); \
73 mfspr r12,SPRN_SRR0; \
99 mr r12, r13
103 mfcr r12
111 rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */
114 stw r12, _CCR(r11) /* save various registers */
115 mflr r12
116 stw r12,_LINK(r11)
[all …]
Dhead_fsl_booke.S312 rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
313 lwzx r11, r12, r11; /* Get pgd/pmd entry */ \
314 rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */ \
319 xor r12, r10, r11; /* drop size bits from pointer */ \
321 1000: rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \
323 1001: lwz r11, 4(r12); /* Get pte entry */
326 rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
327 lwzx r11, r12, r11; /* Get pgd/pmd entry */ \
328 rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */ \
330 rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \
[all …]
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
Dlos_dispatch.S48 push {r12, lr}
50 pop {r12, lr}
71 ldr r12, [r0]
74 add r12, r12, #100
76 ldmfd r12!, {r0-r7}
77 add r12, r12, #72
78 msr psp, r12
82 add r12, r12, #36
84 ldmfd r12!, {r0-r7}
85 msr psp, r12
[all …]
/kernel/linux/linux-5.10/arch/arm/crypto/
Dsha256-core.S_shipped102 ldr r12,.LOPENSSL_armcap
103 ldr r12,[r3,r12] @ OPENSSL_armcap_P
104 tst r12,#ARMV8_SHA256
106 tst r12,#ARMV7_NEON
121 eor r12,r12,r12
128 add r4,r4,r12 @ h+=Maj(a,b,c) from the past
135 add r4,r4,r12 @ h+=Maj(a,b,c) from the past
136 ldrb r12,[r1,#2]
138 orr r2,r2,r12,lsl#8
139 ldrb r12,[r1],#4
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-imx/
Dssi-fiq.S42 ldr r12, .L_imx_ssi_fiq_base
48 ldr r11, [r12, #SSI_SIER]
53 ldr r11, [r12, #SSI_SISR]
64 strh r11, [r12, #SSI_STX0]
67 strh r11, [r12, #SSI_STX0]
70 strh r11, [r12, #SSI_STX0]
73 strh r11, [r12, #SSI_STX0]
84 ldr r11, [r12, #SSI_SIER]
89 ldr r11, [r12, #SSI_SISR]
101 ldr r11, [r12, #SSI_SACNT]
[all …]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
Dlos_dispatch.S51 push {r12, lr}
53 pop {r12, lr}
74 ldr r12, [r0]
82 add r12, r12, #100
84 ldmfd r12!, {r0-r7}
85 add r12, r12, #72
86 msr psp, r12
95 ADD r12, r12, #36
97 LDMFD r12!, {r0-r7}
98 MSR psp, r12
[all …]
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
Dlos_dispatch.S54 push {r12, lr}
56 pop {r12, lr}
77 ldr r12, [r0]
84 add r12, r12, #100
86 ldmfd r12!, {R0-R7}
87 add r12, r12, #72
88 msr psp, r12
96 add r12, r12, #36
98 ldmfd r12!, {r0-r7}
99 msr psp, r12
[all …]
/kernel/linux/linux-5.10/arch/x86/mm/
Dmem_encrypt_boot.S41 push %r12
44 movq %rdx, %r12 /* Area length */
56 movq %r12, %rcx /* Area length */
63 pop %r12
109 push %r12
126 movq $PMD_PAGE_SIZE, %r12
128 cmpq %r12, %r9
130 movq %r9, %r12
135 movq %r12, %rcx
140 movq %r12, %rcx
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/
Dopal-calls.S33 mfcr r12
34 stw r12,8(r1)
40 mfmsr r12
44 andc r12,r12,r11
45 mtspr SPRN_HSRR1,r12
49 ld r12,8(r11)
51 mtspr SPRN_HSRR0,r12
58 ld r12,16(r1)
60 mtlr r12
/kernel/linux/linux-5.10/arch/arm/kernel/
Dhead-nommu.S75 ldr r12, [r10, #PROCINFO_INITFUNC]
76 add r12, r12, r10
77 ret r12
113 ldr r12, [r10, #PROCINFO_INITFUNC]
114 add r12, r12, r10
115 ret r12
132 M_CLASS(movw r12, #:lower16:BASEADDR_V7M_SCB)
133 M_CLASS(movt r12, #:upper16:BASEADDR_V7M_SCB)
135 M_CLASS(ldr r3, [r12, 0x50])
152 M_CLASS(streq r3, [r12, #PMSAv8_MAIR0])
[all …]

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