| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.h | 29 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num,
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| D | nv.c | 219 u32 sh_num, u32 reg_offset) in nv_read_indexed_register() argument
224 if (se_num != 0xffffffff || sh_num != 0xffffffff) in nv_read_indexed_register()
225 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in nv_read_indexed_register()
229 if (se_num != 0xffffffff || sh_num != 0xffffffff) in nv_read_indexed_register()
237 u32 sh_num, u32 reg_offset) in nv_get_register_value() argument
240 return nv_read_indexed_register(adev, se_num, sh_num, reg_offset); in nv_get_register_value()
249 u32 sh_num, u32 reg_offset, u32 *value) in nv_read_register() argument
263 se_num, sh_num, reg_offset); in nv_read_register()
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| D | soc15.c | 345 u32 sh_num, u32 reg_offset) in soc15_read_indexed_register() argument
350 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
351 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in soc15_read_indexed_register()
355 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
363 u32 sh_num, u32 reg_offset) in soc15_get_register_value() argument
366 return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset); in soc15_get_register_value()
377 u32 sh_num, u32 reg_offset, u32 *value) in soc15_read_register() argument
393 se_num, sh_num, reg_offset); in soc15_read_register()
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| D | vi.c | 539 u32 sh_num, u32 reg_offset) in vi_get_register_value() argument
544 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in vi_get_register_value()
558 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
559 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in vi_get_register_value()
563 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
634 u32 sh_num, u32 reg_offset, u32 *value) in vi_read_register() argument
645 *value = vi_get_register_value(adev, indexed, se_num, sh_num, in vi_read_register()
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| D | cik.c | 1048 u32 sh_num, u32 reg_offset) in cik_get_register_value() argument
1053 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in cik_get_register_value()
1067 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1068 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in cik_get_register_value()
1072 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1143 u32 sh_num, u32 reg_offset, u32 *value) in cik_read_register() argument
1154 *value = cik_get_register_value(adev, indexed, se_num, sh_num, in cik_read_register()
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| D | si.c | 1056 u32 sh_num, u32 reg_offset) in si_get_register_value() argument
1061 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in si_get_register_value()
1073 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1074 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in si_get_register_value()
1078 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1130 u32 sh_num, u32 reg_offset, u32 *value) in si_read_register() argument
1141 *value = si_get_register_value(adev, indexed, se_num, sh_num, in si_read_register()
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| D | amdgpu_kms.c | 679 unsigned sh_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
689 if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK) in amdgpu_info_ioctl()
690 sh_num = 0xffffffff; in amdgpu_info_ioctl()
691 else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE) in amdgpu_info_ioctl()
704 if (amdgpu_asic_read_register(adev, se_num, sh_num, in amdgpu_info_ioctl()
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| D | gfx_v9_4.c | 94 u32 sh_num, u32 instance) in gfx_v9_4_select_se_sh() argument
111 if (sh_num == 0xffffffff) in gfx_v9_4_select_se_sh()
115 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_4_select_se_sh()
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| D | amdgpu_gfx.h | 205 u32 sh_num, u32 instance);
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| D | gfx_v6_0.c | 1302 u32 sh_num, u32 instance) in gfx_v6_0_select_se_sh() argument
1311 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v6_0_select_se_sh()
1316 (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
1317 else if (sh_num == 0xffffffff) in gfx_v6_0_select_se_sh()
1321 data |= (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT) | in gfx_v6_0_select_se_sh()
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| D | gfx_v7_0.c | 1589 u32 se_num, u32 sh_num, u32 instance) in gfx_v7_0_select_se_sh() argument
1598 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v7_0_select_se_sh()
1603 (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
1604 else if (sh_num == 0xffffffff) in gfx_v7_0_select_se_sh()
1608 data |= (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT) | in gfx_v7_0_select_se_sh()
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| D | amdgpu.h | 592 u32 sh_num, u32 reg_offset, u32 *value);
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| D | gfx_v8_0.c | 3432 u32 se_num, u32 sh_num, u32 instance) in gfx_v8_0_select_se_sh() argument
3446 if (sh_num == 0xffffffff) in gfx_v8_0_select_se_sh()
3449 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
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| D | gfx_v9_0.c | 2428 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, in gfx_v9_0_select_se_sh() argument
2443 if (sh_num == 0xffffffff) in gfx_v9_0_select_se_sh()
2446 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_0_select_se_sh()
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| D | gfx_v10_0.c | 3207 u32 sh_num, u32 instance);
4548 u32 sh_num, u32 instance) in gfx_v10_0_select_se_sh() argument
4565 if (sh_num == 0xffffffff) in gfx_v10_0_select_se_sh()
4569 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v10_0_select_se_sh()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | si.c | 2952 u32 se_num, u32 sh_num) in si_select_se_sh() argument
2956 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in si_select_se_sh()
2959 data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num); in si_select_se_sh()
2960 else if (sh_num == 0xffffffff) in si_select_se_sh()
2963 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in si_select_se_sh()
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| D | cik.c | 3036 u32 se_num, u32 sh_num) in cik_select_se_sh() argument
3040 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in cik_select_se_sh()
3043 data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num); in cik_select_se_sh()
3044 else if (sh_num == 0xffffffff) in cik_select_se_sh()
3047 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in cik_select_se_sh()
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