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Searched refs:swizzle (Results 1 – 25 of 29) sorted by relevance

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/kernel/linux/linux-5.10/arch/arm/include/asm/mach/
Dpci.h27 u8 (*swizzle)(struct pci_dev *dev, u8 *pin); member
44 u8 (*swizzle)(struct pci_dev *, u8 *); member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_mman.c25 unsigned int swizzle; member
63 switch (tile->swizzle) { in tiled_offset()
341 tile.swizzle = I915_BIT_6_SWIZZLE_NONE; in igt_partial_tiling()
366 tile.swizzle = i915->ggtt.bit_6_swizzle_x; in igt_partial_tiling()
369 tile.swizzle = i915->ggtt.bit_6_swizzle_y; in igt_partial_tiling()
373 GEM_BUG_ON(tile.swizzle == I915_BIT_6_SWIZZLE_UNKNOWN); in igt_partial_tiling()
374 if (tile.swizzle == I915_BIT_6_SWIZZLE_9_17 || in igt_partial_tiling()
375 tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17) in igt_partial_tiling()
482 tile.swizzle = I915_BIT_6_SWIZZLE_NONE; in igt_smoke_tiling()
486 tile.swizzle = i915->ggtt.bit_6_swizzle_x; in igt_smoke_tiling()
[all …]
Di915_gem_client_blt.c315 unsigned int swizzle; in tiled_offset() local
329 swizzle = gt->ggtt->bit_6_swizzle_x; in tiled_offset()
339 swizzle = gt->ggtt->bit_6_swizzle_y; in tiled_offset()
342 switch (swizzle) { in tiled_offset()
/kernel/linux/linux-5.10/arch/arm/kernel/
Dbios32.c367 if (sys->swizzle) in pcibios_swizzle()
368 slot = sys->swizzle(dev, pin); in pcibios_swizzle()
445 sys->swizzle = hw->swizzle; in pcibios_init_hw()
/kernel/linux/linux-5.10/arch/arm/mach-footbridge/
Dcats-pci.c48 .swizzle = cats_no_swizzle,
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-lazor-r0.dts21 * that means we no longer need the swizzle.
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddchubbub.h127 enum swizzle_mode_values swizzle,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hubbub.c138 enum swizzle_mode_values swizzle, in hubbub3_dcc_support_swizzle() argument
147 switch (swizzle) { in hubbub3_dcc_support_swizzle()
Ddcn30_hubbub.h102 enum swizzle_mode_values swizzle,
Ddcn30_hubp.c335 SW_MODE, info->gfx9.swizzle, in hubp3_program_tiling()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubbub.h95 enum swizzle_mode_values swizzle,
Ddcn20_hubbub.c57 enum swizzle_mode_values swizzle, in hubbub2_dcc_support_swizzle() argument
66 switch (swizzle) { in hubbub2_dcc_support_swizzle()
Ddcn20_resource.c1803 enum swizzle_mode_values swizzle, in swizzle_to_dml_params() argument
1806 switch (swizzle) { in swizzle_to_dml_params()
2350 swizzle_mode_to_macro_tile_size(pln->tiling_info.gfx9.swizzle);
2351 swizzle_to_dml_params(pln->tiling_info.gfx9.swizzle,
3319 enum swizzle_mode_values swizzle = DC_SW_LINEAR; local
3322 swizzle = DC_SW_64KB_D;
3324 swizzle = DC_SW_64KB_S;
3326 plane_state->tiling_info.gfx9.swizzle = swizzle;
Ddcn20_hubp.c321 SW_MODE, info->gfx9.swizzle, in hubp2_program_tiling()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
Ddc_debug.c170 plane_state->tiling_info.gfx9.swizzle); in pre_surface_trace()
256 update->plane_info->tiling_info.gfx9.swizzle); in update_surface_trace()
Ddc.c1783 if (u->plane_info->tiling_info.gfx9.swizzle != DC_SW_LINEAR) { in get_plane_info_update_type()
Ddc_resource.c2232 pipe_ctx->plane_state->tiling_info.gfx9.swizzle == DC_SW_UNKNOWN) { in dc_validate_global_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_resource.c1274 enum swizzle_mode_values swizzle = DC_SW_LINEAR; in dcn10_patch_unknown_plane_state() local
1277 swizzle = DC_SW_64KB_D; in dcn10_patch_unknown_plane_state()
1279 swizzle = DC_SW_64KB_S; in dcn10_patch_unknown_plane_state()
1281 plane_state->tiling_info.gfx9.swizzle = swizzle; in dcn10_patch_unknown_plane_state()
Ddcn10_hubbub.c713 enum swizzle_mode_values swizzle, in hubbub1_dcc_support_swizzle() argument
721 switch (swizzle) { in hubbub1_dcc_support_swizzle()
Ddcn10_hubp.c157 SW_MODE, info->gfx9.swizzle, in hubp1_program_tiling()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc416 // Calculates the hw swizzle mask and adjusts the surface's xcnt to match
419 // zero out a chunk of the stack to store the swizzle into
435 // convert FORMAT swizzle mask to hw swizzle mask
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h380 enum swizzle_mode_values swizzle; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c338 input->src.sw_mode = pipe->plane_state->tiling_info.gfx9.swizzle; in pipe_ctx_to_e2e_pipe_params()
347 …src.macro_tile_size = swizzle_mode_to_macro_tile_size(pipe->plane_state->tiling_info.gfx9.swizzle); in pipe_ctx_to_e2e_pipe_params()
1025 pipe->plane_state->tiling_info.gfx9.swizzle); in dcn_validate_bandwidth()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_mem_input.c437 GRPH_SW_MODE, info->gfx9.swizzle, in program_tiling()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_debugfs.c1120 static const char *swizzle_string(unsigned swizzle) in swizzle_string() argument
1122 switch (swizzle) { in swizzle_string()

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