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Searched refs:ADDU (Results 1 – 25 of 25) sorted by relevance

/third_party/openssl/crypto/bn/asm/
Dmips.pl67 $ADDU="daddu";
82 $ADDU="addu";
178 $ADDU $t1,$v0
184 $ADDU $t1,$at
185 $ADDU $v0,$t0
189 $ADDU $v0,$at
193 $ADDU $t3,$v0
197 $ADDU $t3,$at
198 $ADDU $v0,$t2
202 $ADDU $v0,$at
[all …]
Dmips-mont.pl87 $ADDU="daddu";
94 $ADDU="addu";
207 $ADDU $lo1,$lo0
209 $ADDU $hi1,$at
224 $ADDU $lo0,$alo,$hi0
225 $ADDU $lo1,$nlo,$hi1
228 $ADDU $hi0,$ahi,$at
229 $ADDU $hi1,$nhi,$t0
233 $ADDU $lo1,$lo0
236 $ADDU $hi1,$at
[all …]
Dbn-c64xplus.asm69 ADDU A16,A7,A21:A20
70 ADDU A19,A21:A20,A19:A18
96 ADDU A19,A16,A19:A18
147 ADDU A7,B7,A9:A8
148 ADDU A1,A9:A8,A1:A0
256 ADDU B16,B7,B21:B20
257 ADDU B19,B21:B20,B19:B18
/third_party/node/deps/openssl/openssl/crypto/bn/asm/
Dmips.pl67 $ADDU="daddu";
82 $ADDU="addu";
178 $ADDU $t1,$v0
184 $ADDU $t1,$at
185 $ADDU $v0,$t0
189 $ADDU $v0,$at
193 $ADDU $t3,$v0
197 $ADDU $t3,$at
198 $ADDU $v0,$t2
202 $ADDU $v0,$at
[all …]
Dmips-mont.pl87 $ADDU="daddu";
94 $ADDU="addu";
207 $ADDU $lo1,$lo0
209 $ADDU $hi1,$at
224 $ADDU $lo0,$alo,$hi0
225 $ADDU $lo1,$nlo,$hi1
228 $ADDU $hi0,$ahi,$at
229 $ADDU $hi1,$nhi,$t0
233 $ADDU $lo1,$lo0
236 $ADDU $hi1,$at
[all …]
Dbn-c64xplus.asm69 ADDU A16,A7,A21:A20
70 ADDU A19,A21:A20,A19:A18
96 ADDU A19,A16,A19:A18
147 ADDU A7,B7,A9:A8
148 ADDU A1,A9:A8,A1:A0
256 ADDU B16,B7,B21:B20
257 ADDU B19,B21:B20,B19:B18
/third_party/node/deps/openssl/openssl/crypto/sha/asm/
Dsha512-mips.pl104 $ADDU="daddu";
119 $ADDU="addu";
196 $ADDU $T1,$X[0],$h
206 $ADDU $T1,$tmp2
210 $ADDU $T1,$tmp0
215 $ADDU $T1,$X[0],$h # $i
232 $ADDU $T1,$tmp2
235 $ADDU $T1,$tmp0
249 $ADDU $h,$tmp0
251 $ADDU $T1,$tmp2 # +=K[$i]
[all …]
/third_party/openssl/crypto/sha/asm/
Dsha512-mips.pl104 $ADDU="daddu";
119 $ADDU="addu";
196 $ADDU $T1,$X[0],$h
206 $ADDU $T1,$tmp2
210 $ADDU $T1,$tmp0
215 $ADDU $T1,$X[0],$h # $i
232 $ADDU $T1,$tmp2
235 $ADDU $T1,$tmp0
249 $ADDU $h,$tmp0
251 $ADDU $T1,$tmp2 # +=K[$i]
[all …]
/third_party/libffi/src/mips/
Dn32.S85 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
93 ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
111 ADDU t9, t9, t8
369 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
457 ADDU a3, $sp, V0_OFF2 # rvalue
458 ADDU a4, $sp, A0_OFF2 # ar
459 ADDU a5, $sp, F12_OFF2 # fpr
491 ADDU a3, $sp, V0_OFF2
492 ADDU a4, $sp, A0_OFF2
493 ADDU a5, $sp, F12_OFF2
[all …]
Dffitarget.h151 # define ADDU addu macro
158 # define ADDU daddu macro
Do32.S68 ADDU v0, bytes, 7 # make sure it is aligned
75 ADDU a0, $sp, 4 * FFI_SIZEOF_ARG
83 ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
195 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
390 ADDU $sp, SIZEOF_FRAME2
/third_party/pcre2/pcre2/src/sljit/
DsljitNativeMIPS_32.c172 ins = ADDU | S(word_arg_count) | TA(0) | DA(4 + (*offsets_ptr >> 2)); in call_with_args()
174 ins = ADDU | S(SLJIT_R0) | TA(0) | DA(4); in call_with_args()
271 FAIL_IF(push_inst(compiler, ADDU | S(src) | TA(0) | D(PIC_ADDR_REG), DR(PIC_ADDR_REG))); in sljit_emit_icall()
291 FAIL_IF(push_inst(compiler, ADDU | S(src) | TA(0) | D(PIC_ADDR_REG), DR(PIC_ADDR_REG))); in sljit_emit_icall()
DsljitNativeMIPS_common.c141 #define ADDU (HI(0) | LO(33)) macro
304 #define ADDU_W ADDU
1424 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src) | TA(0) | D(TMP_REG2), DR(TMP_REG2))); in emit_clz_ctz()
1442 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(TMP_REG2) | TA(0) | DA(EQUAL_FLAG), EQUAL_F… in emit_clz_ctz()
1457 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | SA(OTHER_FLAG) | TA(0) | D(dst), DR(dst)); in emit_clz_ctz()
1475 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
1617 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLA… in emit_single_op()
1625 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | TA(0) | DA(OTHER_FLAG), OTHER_FLAG)… in emit_single_op()
1632 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
1648 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp876 unsigned ADDU = ABI.GetPtrAdduOp(); in expandEhReturn() local
889 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9) in expandEhReturn()
892 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA) in expandEhReturn()
895 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg); in expandEhReturn()
DMipsDSPInstrFormats.td64 // ADDU.QB sub-class format.
DMips16InstrInfo.td570 // Format: ADDU rz, rx, ry MIPS16e
/third_party/node/deps/v8/src/codegen/mips/
Dconstants-mips.h536 ADDU = ((4U << 3) + 1), enumerator
1286 FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) |
Dassembler-mips.cc626 return opcode == SPECIAL && sa_field == 0 && function_field == ADDU && in IsAddu()
1782 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
/third_party/node/deps/v8/src/codegen/mips64/
Dconstants-mips64.h543 ADDU = ((4U << 3) + 1), enumerator
1347 FunctionFieldToBitNumber(ADDU) | FunctionFieldToBitNumber(DADDU) |
Dassembler-mips64.cc1720 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
/third_party/node/deps/v8/src/diagnostics/mips/
Ddisasm-mips.cc1349 case ADDU: in DecodeTypeRegisterSPECIAL()
/third_party/node/deps/v8/src/diagnostics/mips64/
Ddisasm-mips64.cc1575 case ADDU: in DecodeTypeRegisterSPECIAL()
/third_party/libffi/
DChangeLog.old2794 * src/mips/n32.S (ffi_call_N32): Replace dadd with ADDU, dsub with
2795 SUBU, add with ADDU and use smaller code sequences.
2985 * src/mips/ffitarget.h (REG_L, REG_S, SUBU, ADDU, SRL, LI): Indent.
/third_party/node/deps/v8/src/execution/mips/
Dsimulator-mips.cc4003 case ADDU: in DecodeTypeRegisterSPECIAL()
/third_party/node/deps/v8/src/execution/mips64/
Dsimulator-mips64.cc4090 case ADDU: { in DecodeTypeRegisterSPECIAL()