Searched refs:ADD_W (Results 1 – 6 of 6) sorted by relevance
| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | constants-loong64.h | 334 ADD_W = 0x20U << 15, enumerator
1072 case ADD_W: in InstructionType()
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| D | assembler-loong64.cc | 1025 GenRegister(ADD_W, rk, rj, rd); in add_w()
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| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeARM_T2_32.c | 106 #define ADD_W 0xeb000000 macro
850 return push_inst32(compiler, ADD_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2)); in emit_op_imm()
1950 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | (… in emit_fop_mem()
2795 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(mem & REG_MASK) | RM4(OFFS_REG(mem)) | (… in sljit_emit_mem()
2882 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(mem & REG_MASK) | RM4(OFFS_REG(mem)) | (… in sljit_emit_mem()
3003 …return push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | ((… in update_mem_addr()
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| /third_party/node/deps/v8/src/diagnostics/loong64/ |
| D | disasm-loong64.cc | 1025 case ADD_W: in DecodeTypekOp17()
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| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 388 #define ADD_W(a, b) CHOICE(addw ARG2(a,b), addw ARG2(a,b), _WTOG add ARG2(b,a)) macro
1116 #define ADD_W(a, b) add W_(b), W_(a) macro
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| /third_party/node/deps/v8/src/execution/loong64/ |
| D | simulator-loong64.cc | 3441 case ADD_W: { in DecodeTypeOp17()
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