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Searched refs:AVX (Results 1 – 25 of 85) sorted by relevance

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/third_party/node/deps/v8/src/codegen/shared-ia32-x64/
Dmacro-assembler-shared-ia32-x64.cc82 if (CpuFeatures::IsSupported(AVX)) { in Movhps()
83 CpuFeatureScope scope(this, AVX); in Movhps()
95 if (CpuFeatures::IsSupported(AVX)) { in Movlps()
96 CpuFeatureScope scope(this, AVX); in Movlps()
108 if (CpuFeatures::IsSupported(AVX)) { in Pblendvb()
109 CpuFeatureScope scope(this, AVX); in Pblendvb()
121 if (CpuFeatures::IsSupported(AVX)) { in Shufps()
122 CpuFeatureScope avx_scope(this, AVX); in Shufps()
141 if (CpuFeatures::IsSupported(AVX)) { in F64x2ExtractLane()
142 CpuFeatureScope avx_scope(this, AVX); in F64x2ExtractLane()
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Dmacro-assembler-shared-ia32-x64.h73 if (CpuFeatures::IsSupported(AVX)) { in Pshufb()
74 CpuFeatureScope avx_scope(this, AVX); in Pshufb()
109 if (CpuFeatures::IsSupported(AVX)) { in emit()
110 CpuFeatureScope scope(assm, AVX); in emit()
128 if (CpuFeatures::IsSupported(AVX)) { in emit()
129 CpuFeatureScope scope(assm, AVX); in emit()
148 if (CpuFeatures::IsSupported(AVX)) { in emit()
149 CpuFeatureScope scope(assm, AVX); in emit()
499 if (CpuFeatures::IsSupported(AVX)) {
500 CpuFeatureScope scope(assm, AVX);
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/third_party/ffmpeg/libavutil/x86/
Dcpu.h44 #define X86_AVX(flags) CPUEXT(flags, AVX)
45 #define X86_AVX_FAST(flags) CPUEXT_FAST(flags, AVX)
46 #define X86_AVX_SLOW(flags) CPUEXT_SLOW(flags, AVX)
70 #define EXTERNAL_AVX(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX)
71 #define EXTERNAL_AVX_FAST(flags) CPUEXT_SUFFIX_FAST(flags, _EXTERNAL, AVX)
72 #define EXTERNAL_AVX_SLOW(flags) CPUEXT_SUFFIX_SLOW(flags, _EXTERNAL, AVX)
75 #define EXTERNAL_FMA3_FAST(flags) CPUEXT_SUFFIX_FAST2(flags, _EXTERNAL, FMA3, AVX)
76 #define EXTERNAL_FMA3_SLOW(flags) CPUEXT_SUFFIX_SLOW2(flags, _EXTERNAL, FMA3, AVX)
79 #define EXTERNAL_AVX2_FAST(flags) CPUEXT_SUFFIX_FAST2(flags, _EXTERNAL, AVX2, AVX)
80 #define EXTERNAL_AVX2_SLOW(flags) CPUEXT_SUFFIX_SLOW2(flags, _EXTERNAL, AVX2, AVX)
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/third_party/node/deps/v8/src/codegen/x64/
Dassembler-x64.cc100 SetSupported(AVX); in ProbeImpl()
125 if (!FLAG_enable_avx || !IsSupported(SSE4_2)) SetUnsupported(AVX); in ProbeImpl()
126 if (!FLAG_enable_avx2 || !IsSupported(AVX)) SetUnsupported(AVX2); in ProbeImpl()
127 if (!FLAG_enable_fma3 || !IsSupported(AVX)) SetUnsupported(FMA3); in ProbeImpl()
151 CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX), in PrintFeatures()
2707 DCHECK(!IsEnabled(AVX)); in movd()
2717 DCHECK(!IsEnabled(AVX)); in movd()
2727 DCHECK(!IsEnabled(AVX)); in movd()
2738 DCHECK(!IsEnabled(AVX)); in movq()
2749 DCHECK(!IsEnabled(AVX)); in movq()
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Dmacro-assembler-x64.cc875 if (CpuFeatures::IsSupported(AVX)) { in CallRecordWriteStub()
876 CpuFeatureScope avx_scope(this, AVX); in CallRecordWriteStub()
884 if (CpuFeatures::IsSupported(AVX)) { in CallRecordWriteStub()
885 CpuFeatureScope avx_scope(this, AVX); in CallRecordWriteStub()
893 if (CpuFeatures::IsSupported(AVX)) { in CallRecordWriteStub()
894 CpuFeatureScope avx_scope(this, AVX); in CallRecordWriteStub()
903 if (CpuFeatures::IsSupported(AVX)) { in CallRecordWriteStub()
904 CpuFeatureScope scope(this, AVX); in CallRecordWriteStub()
912 if (CpuFeatures::IsSupported(AVX)) { in CallRecordWriteStub()
913 CpuFeatureScope scope(this, AVX); in CallRecordWriteStub()
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/third_party/openh264/codec/common/x86/
Dcpuid.asm158 ; refer to detection of AVX addressed in INTEL AVX manual document
160 cmp ecx, 018000000H ; check both OSXSAVE and AVX feature flags
162 ; processor supports AVX instructions and XGETBV is enabled by OS
190 ; refer to detection of FMA addressed in INTEL AVX manual document
192 cmp ecx, 018001000H ; check OSXSAVE, AVX, FMA feature flags
194 ; processor supports AVX,FMA instructions and XGETBV is enabled by OS
/third_party/skia/src/core/
DSkCpu.h21 AVX = 1 << 6, enumerator
83 features |= AVX; in Supports()
97 features &= (SSE1 | SSE2 | SSE3 | SSSE3 | SSE41 | SSE42 | AVX); in Supports()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86.td118 def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
119 "Enable AVX instructions",
131 "Enable AVX-512 instructions",
134 "Enable AVX-512 Exponential and Reciprocal Instructions",
137 "Enable AVX-512 Conflict Detection Instructions",
140 "true", "Enable AVX-512 Population Count Instructions",
143 "Enable AVX-512 PreFetch Instructions",
149 "Enable AVX-512 Doubleword and Quadword Instructions",
152 "Enable AVX-512 Byte and Word Instructions",
155 "Enable AVX-512 Vector Length eXtensions",
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DX86InstrFormats.td487 // AVX instructions have a 'v' prefix in the mnemonic
504 // AVX instructions have a 'v' prefix in the mnemonic
518 // AVX instructions have a 'v' prefix in the mnemonic
533 // AVX instructions have a 'v' prefix in the mnemonic
556 // AVX instructions have a 'v' prefix in the mnemonic
567 // VSSI - SSE1 instructions with XS prefix in AVX form.
568 // VPSI - SSE1 instructions with PS prefix in AVX form, packed single.
601 // VSDI - SSE2 scalar instructions with XD prefix in AVX form.
602 // VPDI - SSE2 vector instructions with PD prefix in AVX form,
604 // VS2I - SSE2 scalar instructions with PD prefix in AVX form.
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DX86CallingConv.td223 // Boolean vectors of AVX-512 are returned in SIMD registers.
224 // The call from AVX to AVX-512 function should work,
225 // since the boolean types in AVX/AVX2 are promoted by default.
241 // supported while using the AVX target feature.
247 // supported while using the AVX-512 target feature.
531 // Boolean vectors of AVX-512 are passed in SIMD registers.
532 // The call from AVX to AVX-512 function should work,
533 // since the boolean types in AVX/AVX2 are promoted by default.
684 // AVX
688 // AVX-512
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DX86RegisterInfo.td251 // YMM0-15 registers, used by AVX instructions and
252 // YMM16-31 registers, used by AVX-512 instructions.
260 // ZMM Registers, used by AVX-512 instructions.
268 // Mask Registers, used by AVX-512 instructions.
576 // AVX-512 vector/mask registers.
584 // Scalar AVX-512 floating point registers.
589 // Extended VR128 and VR256 for AVX-512 instructions
/third_party/node/deps/base64/base64/
DCMakeLists.txt61 cmake_dependent_option(BASE64_WITH_AVX "add AVX codepath" ON ${_IS_X86} OFF)
62 add_feature_info(AVX BASE64_WITH_AVX "add AVX codepath")
63 cmake_dependent_option(BASE64_WITH_AVX2 "add AVX 2 codepath" ON ${_IS_X86} OFF)
207 configure_codec(AVX)
/third_party/node/deps/v8/src/wasm/baseline/x64/
Dliftoff-assembler-x64.h1482 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_add()
1483 CpuFeatureScope scope(this, AVX); in emit_f32_add()
1495 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_sub()
1496 CpuFeatureScope scope(this, AVX); in emit_f32_sub()
1510 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_mul()
1511 CpuFeatureScope scope(this, AVX); in emit_f32_mul()
1523 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_div()
1524 CpuFeatureScope scope(this, AVX); in emit_f32_div()
1669 if (CpuFeatures::IsSupported(AVX)) { in emit_f64_add()
1670 CpuFeatureScope scope(this, AVX); in emit_f64_add()
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/third_party/node/deps/v8/src/wasm/baseline/ia32/
Dliftoff-assembler-ia32.h1878 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_add()
1879 CpuFeatureScope scope(this, AVX); in emit_f32_add()
1891 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_sub()
1892 CpuFeatureScope scope(this, AVX); in emit_f32_sub()
1906 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_mul()
1907 CpuFeatureScope scope(this, AVX); in emit_f32_mul()
1919 if (CpuFeatures::IsSupported(AVX)) { in emit_f32_div()
1920 CpuFeatureScope scope(this, AVX); in emit_f32_div()
2072 if (CpuFeatures::IsSupported(AVX)) { in emit_f64_add()
2073 CpuFeatureScope scope(this, AVX); in emit_f64_add()
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/third_party/node/deps/v8/src/compiler/backend/ia32/
Dcode-generator-ia32.cc488 if (CpuFeatures::IsSupported(AVX)) { \
489 CpuFeatureScope avx_scope(tasm(), AVX); \
498 if (CpuFeatures::IsSupported(AVX)) { \
499 CpuFeatureScope avx_scope(tasm(), AVX); \
545 if (CpuFeatures::IsSupported(AVX)) { \
546 CpuFeatureScope avx_scope(tasm(), AVX); \
554 if (CpuFeatures::IsSupported(AVX)) { \
555 CpuFeatureScope avx_scope(tasm(), AVX); \
2108 if (CpuFeatures::IsSupported(AVX)) { in AssembleArchInstruction()
2109 CpuFeatureScope avx_scope(tasm(), AVX); in AssembleArchInstruction()
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Dinstruction-selector-ia32.cc328 if (selector->IsSupported(AVX)) { in VisitRROFloat()
343 if (selector->IsSupported(AVX)) { in VisitFloatUnop()
356 if (selector->IsSupported(AVX)) { in VisitRRSimd()
375 if (selector->IsSupported(AVX)) { in VisitRROSimd()
386 InstructionOperand dst = selector->IsSupported(AVX) in VisitRRRSimd()
414 if (selector->IsSupported(AVX)) { in VisitRRISimd()
448 InstructionOperand output = CpuFeatures::IsSupported(AVX) in VisitI8x16Shift()
506 InstructionOperand outputs[] = {IsSupported(AVX) ? g.DefineAsRegister(node) in VisitLoadLane()
2439 if (IsSupported(AVX)) { in VisitF64x2Min()
2450 if (IsSupported(AVX)) { in VisitF64x2Max()
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/third_party/node/deps/v8/src/compiler/backend/x64/
Dinstruction-selector-x64.cc1707 if (selector->IsSupported(AVX)) { in VisitFloatBinop()
1723 if (selector->IsSupported(AVX)) { in VisitFloatUnop()
2450 selector->IsSupported(AVX) ? kAVXFloat32Cmp : kSSEFloat32Cmp; in VisitFloat32Compare()
2460 selector->IsSupported(AVX) ? kAVXFloat64Cmp : kSSEFloat64Cmp; in VisitFloat64Compare()
2592 IsSupported(AVX) ? kAVXFloat64Cmp : kSSEFloat64Cmp; in VisitWordCompareZero()
2820 IsSupported(AVX) ? kAVXFloat64Cmp : kSSEFloat64Cmp; in VisitFloat64LessThan()
3282 IsSupported(AVX) ? g.DefineAsRegister(node) : g.DefineSameAsFirst(node); in VisitF64x2ReplaceLane()
3308 InstructionOperand dst = IsSupported(AVX) ? g.DefineAsRegister(node) \
3326 IsSupported(AVX) ? g.UseRegister(node) : g.DefineSameAsFirst(node); \ in SIMD_SHIFT_OPCODES()
3363 if (IsSupported(AVX)) { \
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/third_party/rust/crates/aho-corasick/src/packed/teddy/
DREADME.md82 1. Teddy's core algorithm scans the haystack in 16 (for SSE, or 32 for AVX)
281 ## AVX section in Implementation notes
283 The AVX version of Teddy extrapolates almost perfectly from the SSE version.
285 and there is no equivalent instruction in AVX. AVX does have VPALIGNR, but it
289 The only other aspect to AVX is that since our masks are still fundamentally
296 that we want to search for. However, when AVX is available, we can extend the
300 time, even though we're using AVX. Instead, we have to scan 16 bytes at a time.
/third_party/node/deps/base64/base64/cmake/Modules/
DTargetSIMDInstructionSet.cmake31 set(COMPILE_FLAGS_AVX "/arch:AVX")
/third_party/skia/third_party/externals/opengl-registry/extensions/ARB/
DARB_map_buffer_alignment.txt52 like SSE and AVX.
114 register file. However, with the advent of AVX, which has a 256 bit
/third_party/node/deps/v8/src/codegen/
Dcpu-features.h22 AVX, enumerator
/third_party/openGLES/extensions/ARB/
DARB_map_buffer_alignment.txt62 like SSE and AVX.
124 register file. However, with the advent of AVX, which has a 256 bit
/third_party/skia/third_party/externals/libwebp/cmake/
Dcpu.cmake45 # flag, but an AVX one. Using that with SSE4 code risks generating illegal
51 set(SIMD_ENABLE_FLAGS "/arch:AVX;/arch:SSE2;;;;")
/third_party/ffmpeg/libavcodec/x86/
Dac3dsp_init.c111 SET_DOWNMIX_ALL(avx, AVX) in DOWNMIX_FUNCS()
/third_party/openssl/doc/man3/
DOPENSSL_ia32cap.pod58 =item bit #60 denoting AVX extension;
123 C<:~0x20> would disable AVX2 code paths, and C<:0> - all post-AVX

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