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Searched refs:AfterLegalizeVectorOps (Results 1 – 6 of 6) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DDAGCombine.h18 AfterLegalizeVectorOps, enumerator
DTargetLowering.h3281 bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; } in isBeforeLegalizeOps()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp954 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in LowerSELECT_CC()
DSIISelLowering.cpp4892 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in lowerEXTRACT_VECTOR_ELT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGISel.cpp905 CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel); in CodeGenAndEmitDAG()
DDAGCombiner.cpp1405 LegalOperations = Level >= AfterLegalizeVectorOps; in Run()
3497 (!VT.isVector() || Level <= AfterLegalizeVectorOps)) { in visitMUL()
10850 if (Level == AfterLegalizeVectorOps && VT.isVector() && in visitTRUNCATE()
17324 if (Level != AfterLegalizeVectorOps && Level != AfterLegalizeTypes) in reduceBuildVecExtToExtBuildVec()
18228 if (Level < AfterLegalizeVectorOps && TLI.isTypeLegal(VT)) in visitCONCAT_VECTORS()
19286 Level < AfterLegalizeVectorOps && in visitVECTOR_SHUFFLE()
19328 N1.isUndef() && Level < AfterLegalizeVectorOps && in visitVECTOR_SHUFFLE()