Searched refs:And0 (Results 1 – 7 of 7) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1614 Instruction *And0 = dyn_cast<Instruction>(I->getOperand(0)); in setupPreSimplifier() local
1616 if (!And0 || !And1) in setupPreSimplifier()
1618 if (And0->getOpcode() != Instruction::And || in setupPreSimplifier()
1621 if (And0->getOperand(1) != And1->getOperand(1)) in setupPreSimplifier()
1624 return B.CreateAnd(B.CreateXor(And0->getOperand(0), And1->getOperand(0)), in setupPreSimplifier()
1625 And0->getOperand(1)); in setupPreSimplifier()
1746 Instruction *And0 = dyn_cast<Instruction>(Xor->getOperand(0)); in setupPostSimplifier() local
1749 if (!And0 || And0->getOpcode() != Instruction::And) in setupPostSimplifier()
1750 std::swap(And0, And1); in setupPostSimplifier()
1751 ConstantInt *C1 = dyn_cast<ConstantInt>(And0->getOperand(1)); in setupPostSimplifier()
[all …]
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| /third_party/skia/third_party/externals/oboe/samples/RhythmGame/third_party/glm/gtx/ |
| D | simd_vec4.inl | 319 __m128 And0 = _mm_and_ps(Sub0, Cmp0); local
322 return _mm_or_ps(And0, And1);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2461 SDValue And0 = N->getOperand(0); in tryBitfieldInsertOpFromOr() local
2463 if (And0.hasOneUse() && And1.hasOneUse() && in tryBitfieldInsertOpFromOr()
2464 isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) && in tryBitfieldInsertOpFromOr()
2473 std::swap(And0, And1); in tryBitfieldInsertOpFromOr()
2478 SDValue Dst = And0->getOperand(0); in tryBitfieldInsertOpFromOr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 875 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); in performORCombine() local
880 if (And0.getOpcode() != ISD::AND) in performORCombine()
883 if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) || in performORCombine()
916 And0.getOperand(0)); in performORCombine()
956 And0->getOperand(0)); in performORCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3979 SDValue And0 = And->getOperand(0); in shrinkAndImmediate() local
3997 if (!CurDAG->MaskedValueIsZero(And0, HighZeros)) in shrinkAndImmediate()
4003 ReplaceNode(And, And0.getNode()); in shrinkAndImmediate()
4009 SDValue NewAnd = CurDAG->getNode(ISD::AND, SDLoc(And), VT, And0, NewMask); in shrinkAndImmediate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4062 auto And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask); in lowerFCopySign() local
4067 Or = MIRBuilder.buildOr(Dst, And0, And1); in lowerFCopySign()
4073 Or = MIRBuilder.buildOr(Dst, And0, And1); in lowerFCopySign()
4079 Or = MIRBuilder.buildOr(Dst, And0, And1); in lowerFCopySign()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 6018 SDValue And0 = DAG.getNode(ISD::AND, DL, ShVT, Op1, BitWidthMinusOneC); in expandROT() local
6020 Result = DAG.getNode(ISD::OR, DL, VT, DAG.getNode(ShOpc, DL, VT, Op0, And0), in expandROT()
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