Home
last modified time | relevance | path

Searched refs:AndCond (Results 1 – 1 of 1) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp4351 Register AndCond = MRI.createVirtualRegister(BoolXExecRC); in emitLoadSRsrcFromVGPRLoop() local
4389 BuildMI(LoopBB, I, DL, TII.get(AndOpc), AndCond) in emitLoadSRsrcFromVGPRLoop()
4393 MRI.setSimpleHint(SaveExec, AndCond); in emitLoadSRsrcFromVGPRLoop()
4397 .addReg(AndCond, RegState::Kill); in emitLoadSRsrcFromVGPRLoop()