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Searched refs:Andnps (Results 1 – 8 of 8) sorted by relevance

/third_party/node/deps/v8/src/codegen/shared-ia32-x64/
Dmacro-assembler-shared-ia32-x64.cc201 Andnps(dst, dst, scratch); in F32x4Min()
233 Andnps(dst, dst, scratch); in F32x4Max()
Dmacro-assembler-shared-ia32-x64.h226 AVX_OP(Andnps, andnps)
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceInstX8664.h140 Andnps, enumerator
1591 : public InstX86BaseBinopXmm<InstX86Base::Andnps, true,
1601 : InstX86BaseBinopXmm<InstX86Base::Andnps, true, in InstX86Andnps()
3087 using Andnps = InstX86Andnps; member
DIceInstX8632.h199 Andnps, enumerator
1650 : public InstX86BaseBinopXmm<InstX86Base::Andnps, true,
1660 : InstX86BaseBinopXmm<InstX86Base::Andnps, true, in InstX86Andnps()
3188 using Andnps = InstX86Andnps; member
DIceTargetLoweringX8632.h467 Context.insert<Insts::Andnps>(Dest, Src0); in _andnps()
DIceTargetLoweringX8664.h463 Context.insert<Insts::Andnps>(Dest, Src0); in _andnps()
/third_party/node/deps/v8/src/compiler/backend/ia32/
Dcode-generator-ia32.cc3025 __ Andnps(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/third_party/node/deps/v8/src/compiler/backend/x64/
Dcode-generator-x64.cc3812 __ Andnps(dst, i.InputSimd128Register(1)); in AssembleArchInstruction() local