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Searched refs:BEXTR (Results 1 – 20 of 20) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h996 X86_INTRINSIC_DATA(bmi_bextr_32, INTR_TYPE_2OP, X86ISD::BEXTR, 0),
997 X86_INTRINSIC_DATA(bmi_bextr_64, INTR_TYPE_2OP, X86ISD::BEXTR, 0),
1105 X86_INTRINSIC_DATA(tbm_bextri_u32, BEXTRI, X86ISD::BEXTR, 0),
1106 X86_INTRINSIC_DATA(tbm_bextri_u64, BEXTRI, X86ISD::BEXTR, 0),
DX86ScheduleSLM.td160 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86ISelLowering.h345 BEXTR, enumerator
DX86ISelDAGToDAG.cpp3500 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract()
5056 SDValue BEXTR = SDValue(NewNode, 0); in Select() local
5057 NewNode = CurDAG->getMachineNode(TestOpc, dl, MVT::i32, BEXTR, BEXTR); in Select()
DX86ScheduleAtom.td144 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86Schedule.td199 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86ScheduleBtVer2.td248 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86SchedSandyBridge.td190 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86.td436 "Indicates that the BEXTR instruction is implemented as a single uop "
DX86ScheduleBdVer2.td558 // BMI1 BEXTR, BMI2 BZHI
DX86ScheduleZnver2.td227 // BMI1 BEXTR, BMI2 BZHI
DX86ScheduleZnver1.td239 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86SchedBroadwell.td198 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86SchedHaswell.td195 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86SchedSkylakeClient.td195 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86SchedSkylakeServer.td195 // BMI1 BEXTR/BLS, BMI2 BZHI
DX86InstrInfo.td285 def X86bextr : SDNode<"X86ISD::BEXTR", SDTIntBinOp>;
2559 // Use BEXTR for 64-bit 'and' with large immediate 'mask'.
DX86ISelLowering.cpp24127 assert(IntrData->Opc0 == X86ISD::BEXTR && "Unexpected opcode"); in LowerINTRINSIC_WO_CHAIN()
29745 case X86ISD::BEXTR: return "X86ISD::BEXTR"; in getTargetNodeName()
42799 return DAG.getNode(X86ISD::BEXTR, SDLoc(N), VT, Op0, in combineBEXTR()
45984 case X86ISD::BEXTR: return combineBEXTR(N, DAG, DCI, Subtarget); in PerformDAGCombine()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc10865 // FastEmit functions for X86ISD::BEXTR.
15148 case X86ISD::BEXTR: return fastEmit_X86ISD_BEXTR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
15606 // FastEmit functions for X86ISD::BEXTR.
15733 case X86ISD::BEXTR: return fastEmit_X86ISD_BEXTR_ri(VT, RetVT, Op0, Op0IsKill, imm1);
15831 // FastEmit functions for X86ISD::BEXTR.
15859 …case X86ISD::BEXTR: return fastEmit_X86ISD_BEXTR_ri_Predicate_i64immSExt32(VT, RetVT, Op0, Op0IsKi…
DX86GenSubtargetInfo.inc202 …{ "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good thr…