| /third_party/skia/src/core/ |
| D | SkCpu.h | 25 BMI1 = 1 << 10, enumerator
28 HSW = AVX2 | BMI1 | BMI2 | F16C | FMA,
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| D | SkCpu.cpp | 58 if (abcd[1] & (1<<3)) { features |= SkCpu::BMI1; } in read_cpu_features()
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| /third_party/node/deps/v8/src/codegen/ |
| D | cpu-features.h | 25 BMI1, enumerator
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| /third_party/node/deps/v8/src/codegen/x64/ |
| D | macro-assembler-x64.cc | 2173 if (CpuFeatures::IsSupported(BMI1)) { in CallRecordWriteStub()
2174 CpuFeatureScope scope(this, BMI1); in CallRecordWriteStub()
2187 if (CpuFeatures::IsSupported(BMI1)) { in CallRecordWriteStub()
2188 CpuFeatureScope scope(this, BMI1); in CallRecordWriteStub()
2201 if (CpuFeatures::IsSupported(BMI1)) { in CallRecordWriteStub()
2202 CpuFeatureScope scope(this, BMI1); in CallRecordWriteStub()
2214 if (CpuFeatures::IsSupported(BMI1)) { in CallRecordWriteStub()
2215 CpuFeatureScope scope(this, BMI1); in CallRecordWriteStub()
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| D | assembler-x64.cc | 107 if (cpu.has_bmi1() && FLAG_enable_bmi1) SetSupported(BMI1); in ProbeImpl()
153 CpuFeatures::IsSupported(BMI1), CpuFeatures::IsSupported(BMI2), in PrintFeatures()
3875 DCHECK(IsEnabled(BMI1)); in bmi1q()
3883 DCHECK(IsEnabled(BMI1)); in bmi1q()
3891 DCHECK(IsEnabled(BMI1)); in bmi1l()
3899 DCHECK(IsEnabled(BMI1)); in bmi1l()
3907 DCHECK(IsEnabled(BMI1)); in tzcntq()
3917 DCHECK(IsEnabled(BMI1)); in tzcntq()
3927 DCHECK(IsEnabled(BMI1)); in tzcntl()
3937 DCHECK(IsEnabled(BMI1)); in tzcntl()
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| /third_party/openssl/doc/man3/ |
| D | OPENSSL_ia32cap.pod | 91 =item bit #64+3 denoting availability of BMI1 instructions, e.g. ANDN;
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| /third_party/node/deps/simdutf/ |
| D | simdutf.h | 677 BMI1 = 0x20, enumerator
817 host_isa |= instruction_set::BMI1; in detect_supported_architectures()
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| D | simdutf.cpp | 1286 …internal::instruction_set::AVX2 | internal::instruction_set::BMI1 | internal::instruction_set::BMI… in implementation()
1475 …internal::instruction_set::AVX2 | internal::instruction_set::BMI1 | internal::instruction_set::BMI2 in implementation()
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| /third_party/node/deps/v8/src/codegen/ia32/ |
| D | assembler-ia32.cc | 151 if (cpu.has_bmi1() && FLAG_enable_bmi1) SetSupported(BMI1); in ProbeImpl()
189 CpuFeatures::IsSupported(BMI1), CpuFeatures::IsSupported(BMI2), in PrintFeatures()
3112 DCHECK(IsEnabled(BMI1)); in bmi1()
3120 DCHECK(IsEnabled(BMI1)); in tzcnt()
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| D | macro-assembler-ia32.cc | 1652 if (CpuFeatures::IsSupported(BMI1)) { in CallRecordWriteStub()
1653 CpuFeatureScope scope(this, BMI1); in CallRecordWriteStub()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ScheduleSLM.td | 160 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86ScheduleAtom.td | 144 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86Schedule.td | 199 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86ScheduleBtVer2.td | 248 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86SchedSandyBridge.td | 190 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86ScheduleBdVer2.td | 558 // BMI1 BEXTR, BMI2 BZHI
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| D | X86ScheduleZnver2.td | 227 // BMI1 BEXTR, BMI2 BZHI
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| D | X86ScheduleZnver1.td | 239 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86SchedBroadwell.td | 198 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86SchedHaswell.td | 195 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86SchedSkylakeClient.td | 195 // BMI1 BEXTR/BLS, BMI2 BZHI
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| D | X86SchedSkylakeServer.td | 195 // BMI1 BEXTR/BLS, BMI2 BZHI
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| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| D | liftoff-assembler-ia32.h | 1832 if (CpuFeatures::IsSupported(BMI1)) { in emit_i64_ctz()
1833 CpuFeatureScope scope(this, BMI1); in emit_i64_ctz()
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| /third_party/node/deps/openssl/openssl/ |
| D | CHANGES.md | 3629 This only affects processors that support the BMI1, BMI2 and ADX extensions
5380 This only affects processors that support the BMI1, BMI2 and ADX extensions
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| /third_party/openssl/ |
| D | CHANGES.md | 3567 This only affects processors that support the BMI1, BMI2 and ADX extensions
5318 This only affects processors that support the BMI1, BMI2 and ADX extensions
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