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Searched refs:CarryOut (Results 1 – 5 of 5) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp394 const DstOp &CarryOut, in buildUAddo() argument
397 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1}); in buildUAddo()
401 const DstOp &CarryOut, in buildUAdde() argument
405 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
DLegalizerHelper.cpp734 Register CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalar() local
737 MIRBuilder.buildUAddo(DstReg, CarryOut, Src1Regs[i], Src2Regs[i]); in narrowScalar()
739 MIRBuilder.buildUAdde(DstReg, CarryOut, Src1Regs[i], in narrowScalar()
744 CarryIn = CarryOut; in narrowScalar()
2213 Register CarryOut = MI.getOperand(1).getReg(); in lower() local
2218 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, RHS); in lower()
2225 Register CarryOut = MI.getOperand(1).getReg(); in lower() local
2236 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, LHS); in lower()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIPeepholeSDWA.cpp909 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2() local
910 if (!CarryOut) in pseudoOpConvertToVOP2()
912 if (!MRI->hasOneUse(CarryIn->getReg()) || !MRI->use_empty(CarryOut->getReg())) in pseudoOpConvertToVOP2()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h470 MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut,
487 MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp44589 SDValue CarryOut = DAG.getConstant(0, DL, N->getValueType(1)); in combineADC() local
44596 return DCI.CombineTo(N, Res1, CarryOut); in combineADC()