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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/
DDWARFExpression.cpp28 typedef Op::Description Desc; in getDescriptions() typedef
31 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr); in getDescriptions()
32 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2); in getDescriptions()
33 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1); in getDescriptions()
34 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1); in getDescriptions()
35 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2); in getDescriptions()
36 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2); in getDescriptions()
37 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4); in getDescriptions()
38 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4); in getDescriptions()
39 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8); in getDescriptions()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/
DLSUnit.cpp70 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in dispatch() local
71 unsigned IsMemBarrier = Desc.HasSideEffects; in dispatch()
72 assert((Desc.MayLoad || Desc.MayStore) && "Not a memory operation!"); in dispatch()
74 if (Desc.MayLoad) in dispatch()
76 if (Desc.MayStore) in dispatch()
79 if (Desc.MayStore) { in dispatch()
104 if (Desc.MayLoad) { in dispatch()
113 assert(Desc.MayLoad && "Expected a load!"); in dispatch()
154 const InstrDesc &Desc = IR.getInstruction()->getDesc(); in isAvailable() local
155 if (Desc.MayLoad && isLQFull()) in isAvailable()
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DResourceManager.cpp65 ResourceState::ResourceState(const MCProcResourceDesc &Desc, unsigned Index, in ResourceState() argument
68 BufferSize(Desc.BufferSize), IsAGroup(countPopulation(ResourceMask) > 1) { in ResourceState()
73 ResourceSizeMask = (1ULL << Desc.NumUnits) - 1; in ResourceState()
282 uint64_t ResourceManager::checkAvailability(const InstrDesc &Desc) const { in checkAvailability()
284 for (const std::pair<uint64_t, ResourceUsage> &E : Desc.Resources) { in checkAvailability()
294 return Desc.UsedProcResGroups & ReservedResourceGroups; in checkAvailability()
298 const InstrDesc &Desc, in issueInstruction() argument
300 for (const std::pair<uint64_t, ResourceUsage> &R : Desc.Resources) { in issueInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86ATTInstPrinter.cpp87 const MCInstrDesc &Desc = MII.get(MI->getOpcode()); in printVecCompareInstr() local
102 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { in printVecCompareInstr()
103 if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) in printVecCompareInstr()
105 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) in printVecCompareInstr()
160 unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2; in printVecCompareInstr()
162 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { in printVecCompareInstr()
163 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
166 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
173 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
174 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; in printVecCompareInstr()
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DX86IntelInstPrinter.cpp67 const MCInstrDesc &Desc = MII.get(MI->getOpcode()); in printVecCompareInstr() local
85 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { in printVecCompareInstr()
86 if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) in printVecCompareInstr()
88 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) in printVecCompareInstr()
142 if (Desc.TSFlags & X86II::EVEX_K) { in printVecCompareInstr()
152 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { in printVecCompareInstr()
153 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
156 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
163 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
164 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; in printVecCompareInstr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DSupport.cpp50 const MCProcResourceDesc &Desc = *SM.getProcResource(I); in computeProcResourceMasks() local
51 if (Desc.SubUnitsIdxBegin) in computeProcResourceMasks()
59 const MCProcResourceDesc &Desc = *SM.getProcResource(I); in computeProcResourceMasks() local
60 if (!Desc.SubUnitsIdxBegin) in computeProcResourceMasks()
63 for (unsigned U = 0; U < Desc.NumUnits; ++U) { in computeProcResourceMasks()
64 uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]]; in computeProcResourceMasks()
74 const MCProcResourceDesc &Desc = *SM.getProcResource(I); in computeProcResourceMasks() local
77 << Desc.Name << '\n'); in computeProcResourceMasks()
/third_party/skia/src/gpu/gl/
DGrGLTexture.h21 struct Desc { struct
31 GrGLTexture(GrGLGpu*, SkBudgeted, const Desc&, GrMipmapStatus); argument
55 const Desc&,
63 GrGLTexture(GrGLGpu*, const Desc&, sk_sp<GrGLTextureParameters>, GrMipmapStatus);
67 const Desc&,
73 void init(const Desc&);
DGrGLTexture.cpp47 GrGLTexture::GrGLTexture(GrGLGpu* gpu, SkBudgeted budgeted, const Desc& desc, in GrGLTexture()
60 GrGLTexture::GrGLTexture(GrGLGpu* gpu, const Desc& desc, GrMipmapStatus mipmapStatus, in GrGLTexture()
75 GrGLTexture::GrGLTexture(GrGLGpu* gpu, const Desc& desc, sk_sp<GrGLTextureParameters> parameters, in GrGLTexture()
85 void GrGLTexture::init(const Desc& desc) { in init()
128 const Desc& desc, in MakeWrapped()
DGrGLTextureRenderTarget.h30 const GrGLTexture::Desc& texDesc,
40 const GrGLTexture::Desc&,
66 const GrGLTexture::Desc& texDesc,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DDebugCounter.h70 static unsigned registerCounter(StringRef Name, StringRef Desc) { in registerCounter() argument
71 return instance().addCounter(Name, Desc); in registerCounter()
134 return std::make_pair(RegisteredCounters[ID], Counters.lookup(ID).Desc); in getCounterInfo()
161 unsigned addCounter(const std::string &Name, const std::string &Desc) { in addCounter() argument
164 Counters[Result].Desc = Desc; in addCounter()
173 std::string Desc; member
DRegistry.h28 StringRef Name, Desc; variable
33 : Name(N), Desc(D), Ctor(C) {} in SimpleRegistryEntry()
36 StringRef getDesc() const { return Desc; } in getDesc()
121 Add(StringRef Name, StringRef Desc) in Add() argument
122 : Entry(Name, Desc, CtorFn), Node(Entry) { in Add()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/
DStatistic.h51 const char *Desc; variable
53 StatisticBase(const char *DebugType, const char *Name, const char *Desc) in StatisticBase() argument
54 : DebugType(DebugType), Name(Name), Desc(Desc) {} in StatisticBase()
58 const char *getDesc() const { return Desc; } in getDesc()
66 TrackingStatistic(const char *DebugType, const char *Name, const char *Desc) in TrackingStatistic() argument
67 : StatisticBase(DebugType, Name, Desc), Value(0), Initialized(false) {} in TrackingStatistic()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp286 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction() local
287 unsigned bytes = Desc.getSize(); in encodeInstruction()
294 if (AMDGPU::isGFX10(STI) && Desc.TSFlags & SIInstrFlags::MIMG) { in encodeInstruction()
315 for (unsigned i = 0, e = Desc.getNumOperands(); i < e; ++i) { in encodeInstruction()
318 if (!AMDGPU::isSISrcOperand(Desc, i)) in encodeInstruction()
323 if (getLitEncoding(Op, Desc.OpInfo[i], STI) != 255) in encodeInstruction()
381 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in getSDWASrcEncoding() local
382 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI); in getSDWASrcEncoding()
475 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in getMachineOpValue() local
476 uint32_t Offset = Desc.getSize(); in getMachineOpValue()
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DR600MCCodeEmitter.cpp105 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction() local
112 } else if (IS_VTX(Desc)) { in encodeInstruction()
122 } else if (IS_TEX(Desc)) { in encodeInstruction()
149 ((Desc.TSFlags & R600_InstFlag::OP1) || in encodeInstruction()
150 Desc.TSFlags & R600_InstFlag::OP2)) { in encodeInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/
DAsmPrinterDwarf.cpp39 void AsmPrinter::EmitSLEB128(int64_t Value, const char *Desc) const { in EmitSLEB128()
40 if (isVerbose() && Desc) in EmitSLEB128()
41 OutStreamer->AddComment(Desc); in EmitSLEB128()
46 void AsmPrinter::EmitULEB128(uint64_t Value, const char *Desc, unsigned PadTo) const { in EmitULEB128() argument
47 if (isVerbose() && Desc) in EmitULEB128()
48 OutStreamer->AddComment(Desc); in EmitULEB128()
108 void AsmPrinter::EmitEncodingByte(unsigned Val, const char *Desc) const { in EmitEncodingByte()
110 if (Desc) in EmitEncodingByte()
111 OutStreamer->AddComment(Twine(Desc) + " Encoding = " + in EmitEncodingByte()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp302 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in reportBranchErrors() local
303 if (Desc.isBranch() || Desc.isCall() || Desc.isReturn()) in reportBranchErrors()
313 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkHWLoop() local
314 if (Desc.isBranch() || Desc.isCall() || Desc.isReturn()) { in checkHWLoop()
327 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I); in checkCOFMax1() local
328 if (Desc.isBranch() || Desc.isCall() || Desc.isReturn()) in checkCOFMax1()
454 MCInstrDesc const &Desc = in checkNewValues() local
456 if (Desc.OpInfo[std::get<1>(Producer)].RegClass == in checkNewValues()
464 if ((Desc.mayLoad() && std::get<1>(Producer) == 1) || in checkNewValues()
465 (Desc.mayStore() && std::get<1>(Producer) == 0)) { in checkNewValues()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyInstPrinter.cpp55 const MCInstrDesc &Desc = MII.get(MI->getOpcode()); in printInst() local
56 if (Desc.isVariadic()) { in printInst()
57 if (Desc.getNumOperands() == 0 && MI->getNumOperands() > 0) in printInst()
59 for (auto I = Desc.getNumOperands(), E = MI->getNumOperands(); I < E; ++I) { in printInst()
65 I != Desc.getNumOperands())) in printInst()
153 unsigned NumFixedOperands = Desc.NumOperands; in printInst()
159 if (Desc.OpInfo[I].OperandType != WebAssembly::OPERAND_BASIC_BLOCK) in printInst()
228 const MCInstrDesc &Desc = MII.get(MI->getOpcode()); in printOperand() local
229 const MCOperandInfo &Info = Desc.OpInfo[OpNo]; in printOperand()
DWebAssemblyMCCodeEmitter.cpp83 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction() local
90 if (I < Desc.getNumOperands()) { in encodeInstruction()
91 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction()
129 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction()
142 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DInstruction.h150 WriteState(const WriteDescriptor &Desc, MCPhysReg RegID,
152 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0),
257 ReadState(const ReadDescriptor &Desc, MCPhysReg RegID) in ReadState() argument
258 : RD(&Desc), RegisterID(RegID), PRFID(0), DependentWrites(0), in ReadState()
396 const InstrDesc &Desc; variable
412 InstructionBase(const InstrDesc &D) : Desc(D), IsOptimizableMove(false) {} in InstructionBase()
418 const InstrDesc &getDesc() const { return Desc; } in getDesc()
420 unsigned getLatency() const { return Desc.MaxLatency; } in getLatency()
421 unsigned getNumMicroOps() const { return Desc.NumMicroOps; } in getNumMicroOps()
438 bool isMemOp() const { return Desc.MayLoad || Desc.MayStore; } in isMemOp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/JITLink/
DMachOLinkGraphBuilder.cpp60 Linkage MachOLinkGraphBuilder::getLinkage(uint16_t Desc) { in getLinkage() argument
61 if ((Desc & MachO::N_WEAK_DEF) || (Desc & MachO::N_WEAK_REF)) in getLinkage()
77 return NSym.Desc & MachO::N_ALT_ENTRY; in isAltEntry()
213 uint16_t Desc; in createNormalizedSymbols() local
222 Desc = NL64.n_desc; in createNormalizedSymbols()
230 Desc = NL32.n_desc; in createNormalizedSymbols()
254 << ", desc = " << formatv("{0:x4}", Desc) << ", sect = "; in createNormalizedSymbols()
276 &createNormalizedSymbol(*Name, Value, Type, Sect, Desc, in createNormalizedSymbols()
317 1ull << MachO::GET_COMM_ALIGN(NSym.Desc), in graphifyRegularSymbols()
318 NSym.Desc & MachO::N_NO_DEAD_STRIP); in graphifyRegularSymbols()
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DMachOLinkGraphBuilder.h39 uint8_t Sect, uint16_t Desc, Linkage L, Scope S) in NormalizedSymbol()
40 : Name(Name), Value(Value), Type(Type), Sect(Sect), Desc(Desc), L(L), in NormalizedSymbol()
55 uint16_t Desc = 0; member
150 static Linkage getLinkage(uint16_t Desc);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/TableGen/
DTableGenBackend.cpp33 void llvm::emitSourceFileHeader(StringRef Desc, raw_ostream &OS) { in emitSourceFileHeader() argument
42 size_t Length = std::min(Desc.size() - Pos, MAX_LINE_LEN - PSLen); in emitSourceFileHeader()
43 printLine(OS, Prefix + Desc.substr(Pos, Length), ' ', Suffix); in emitSourceFileHeader()
45 } while (Pos < Desc.size()); in emitSourceFileHeader()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp345 const MCInstrDesc &Desc = MI.getDesc(); in chooseBestLEA() local
346 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags) + in chooseBestLEA()
347 X86II::getOperandBias(Desc); in chooseBestLEA()
365 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
448 const MCInstrDesc &Desc = MI.getDesc(); in isReplaceable() local
449 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags); in isReplaceable()
456 MemOpNo += X86II::getOperandBias(Desc); in isReplaceable()
514 const MCInstrDesc &Desc = MI.getDesc(); in removeRedundantAddrCalc() local
515 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags); in removeRedundantAddrCalc()
521 MemOpNo += X86II::getOperandBias(Desc); in removeRedundantAddrCalc()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrInfo.h24 const MCInstrDesc *Desc; // Raw array to allow static init'n variable
34 Desc = D; in InitMCInstrInfo()
46 return Desc[Opcode]; in get()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceRangeSpec.h38 struct Desc { struct
72 Desc Includes; argument
73 Desc Excludes;

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