| /third_party/node/deps/v8/src/diagnostics/ppc/ |
| D | disasm-ppc.cc | 1347 case FMSUB: { in DecodeExt4()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | constants-mips.h | 930 FMSUB = ((5U << 22) + 27), enumerator
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| D | assembler-mips.cc | 3271 V(fmsub, FMSUB) \
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | constants-mips64.h | 979 FMSUB = ((5U << 22) + 27), enumerator
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| D | assembler-mips64.cc | 3479 V(fmsub, FMSUB) \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 472 FMSUB, enumerator
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| D | X86InstrFragmentsSIMD.td | 538 def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
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| D | X86ISelLowering.cpp | 29819 case X86ISD::FMSUB: return "X86ISD::FMSUB"; in getTargetNodeName()
35007 if (FMSub.getOpcode() != X86ISD::FMSUB) in combineShuffleToFMAddSub()
35010 if (FMAdd.getOpcode() != ISD::FMA || FMSub.getOpcode() != X86ISD::FMSUB || in combineShuffleToFMAddSub()
42519 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
42523 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
42531 case ISD::FMA: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
42533 case X86ISD::FMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
42551 case X86ISD::FMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
42553 case X86ISD::FNMADD: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
42595 case X86ISD::FMSUB: in combineFneg()
[all …]
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| /third_party/node/deps/v8/src/diagnostics/mips/ |
| D | disasm-mips.cc | 2475 case FMSUB: in DecodeTypeMsa3RF()
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| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| D | disasm-mips64.cc | 2762 case FMSUB: in DecodeTypeMsa3RF()
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| D | constants-ppc.h | 1927 V(fmsub, FMSUB, 0xFC000038) \
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| D | assembler-ppc.cc | 1904 emit(EXT4 | FMSUB | frt.code() * B21 | fra.code() * B16 | frb.code() * B11 | in fmsub()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | P9InstrResources.td | 413 (instregex "FMSUB(S)?$"),
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| D | PPCInstrInfo.td | 2948 defm FMSUB : AForm_1r<63, 28,
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| /third_party/node/deps/v8/src/diagnostics/arm64/ |
| D | disasm-arm64.cc | 1247 FORMAT(FMSUB, "fmsub"); in VisitFPDataProcessing3Source()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenMCCodeEmitter.inc | 940 UINT64_C(4227858488), // FMSUB
3529 case PPC::FMSUB:
7350 CEFBS_None, // FMSUB = 927
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| D | PPCGenInstrInfo.inc | 942 FMSUB = 927,
3911 …Commutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #927 = FMSUB
12651 { PPC::FMSUB_rec, PPC::FMSUB },
12851 { PPC::FMSUB, PPC::FMSUB_rec },
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| D | PPCGenAsmWriter.inc | 2595 19600U, // FMSUB
4886 134U, // FMSUB
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| D | PPCGenDisassemblerTables.inc | 3533 /* 16970 */ MCD::OPC_Decode, 159, 7, 177, 1, // Opcode: FMSUB
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| /third_party/node/deps/v8/src/execution/mips/ |
| D | simulator-mips.cc | 5424 case FMSUB: in Msa3RFInstrHelper()
5703 if (opcode == FMADD || opcode == FMSUB) { in DecodeTypeMsa3RF()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| D | simulator-mips64.cc | 5710 case FMSUB: in Msa3RFInstrHelper()
5989 if (opcode == FMADD || opcode == FMSUB) { in DecodeTypeMsa3RF()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| D | AArch64InstrInfo.td | 3498 defm FMSUB : ThreeOperandFPData<0, 1, "fmsub",
3508 // N.b. FMSUB etc have the accumulator at the *end* of (outs), unlike
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| /third_party/node/deps/v8/src/execution/ppc/ |
| D | simulator-ppc.cc | 3524 case FMSUB: { in ExecuteGeneric()
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| /third_party/vixl/src/aarch64/ |
| D | disasm-aarch64.cc | 2466 FORMAT(FMSUB, "fmsub"); in Disassembler()
|