| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1997 { ISD::FSQRT, MVT::f32, 7 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
1998 { ISD::FSQRT, MVT::v4f32, 7 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
1999 { ISD::FSQRT, MVT::v8f32, 14 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
2000 { ISD::FSQRT, MVT::f64, 14 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
2001 { ISD::FSQRT, MVT::v2f64, 14 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
2002 { ISD::FSQRT, MVT::v4f64, 28 }, // Haswell from http://www.agner.org/ in getIntrinsicInstrCost()
2034 { ISD::FSQRT, MVT::f32, 14 }, // SNB from http://www.agner.org/ in getIntrinsicInstrCost()
2035 { ISD::FSQRT, MVT::v4f32, 14 }, // SNB from http://www.agner.org/ in getIntrinsicInstrCost()
2036 { ISD::FSQRT, MVT::v8f32, 28 }, // SNB from http://www.agner.org/ in getIntrinsicInstrCost()
2037 { ISD::FSQRT, MVT::f64, 21 }, // SNB from http://www.agner.org/ in getIntrinsicInstrCost()
[all …]
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| D | X86.td | 313 // FeatureFastScalarFSQRT should be enabled if scalar FSQRT has shorter latency
315 // vector FSQRT has higher throughput than the corresponding NR code.
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| D | X86IntrinsicsInfo.h | 920 X86_INTRINSIC_DATA(avx512_sqrt_pd_512, INTR_TYPE_1OP, ISD::FSQRT, X86ISD::FSQRT_RND),
921 X86_INTRINSIC_DATA(avx512_sqrt_ps_512, INTR_TYPE_1OP, ISD::FSQRT, X86ISD::FSQRT_RND),
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 81 FUNCTION(sqrt, 1, 1, experimental_constrained_sqrt, FSQRT)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 640 FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW, enumerator
|
| D | BasicTTIImpl.h | 397 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT); in haveFastSqrt()
1220 ISDs.push_back(ISD::FSQRT);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 311 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break; in mightUseCTR()
360 Opcode = ISD::FSQRT; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 297 setOperationAction(ISD::FSQRT, MVT::f64, Expand); in PPCTargetLowering()
302 setOperationAction(ISD::FSQRT, MVT::f32, Expand); in PPCTargetLowering()
643 setOperationAction(ISD::FSQRT, VT, Expand); in PPCTargetLowering()
741 setOperationAction(ISD::FSQRT, MVT::v4f32, Legal); in PPCTargetLowering()
807 setOperationAction(ISD::FSQRT, MVT::v2f64, Legal); in PPCTargetLowering()
1109 setOperationAction(ISD::FSQRT, MVT::v4f64, Legal); in PPCTargetLowering()
1112 setOperationAction(ISD::FSQRT, MVT::v4f32, Legal); in PPCTargetLowering()
1115 setOperationAction(ISD::FSQRT, MVT::v4f64, Expand); in PPCTargetLowering()
1118 setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); in PPCTargetLowering()
1185 setTargetDAGCombine(ISD::FSQRT); in PPCTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenSubtargetInfo.inc | 3652 { 0, 0, 0, 0, 0 }, // 262 FSQRT
3971 { 0, 0, 0, 0, 0 }, // 262 FSQRT
4290 { 0, 0, 0, 0, 0 }, // 262 FSQRT
4609 { 0, 0, 0, 0, 0 }, // 262 FSQRT
4928 { 1, 164, 165, 0, 0 }, // 262 FSQRT
5247 { 1, 185, 186, 1018, 1021 }, // 262 FSQRT
5566 { 0, 0, 0, 0, 0 }, // 262 FSQRT
5885 { 0, 0, 0, 0, 0 }, // 262 FSQRT
6204 { 0, 0, 0, 0, 0 }, // 262 FSQRT
6523 { 1, 321, 323, 3059, 3062 }, // 262 FSQRT
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 548 // FDIV,FSQRT
550 // TODO: Specialize FSQRT for longer latency.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 193 case ISD::FSQRT: return "fsqrt"; in getOperationName()
|
| D | LegalizeFloatTypes.cpp | 119 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break; in SoftenFloatResult()
1176 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break; in ExpandFloatResult()
2121 case ISD::FSQRT: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 419 case ISD::FSQRT: in LegalizeOp()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrFPU.td | 122 defm FSQRT : ABSS_MMM<"sqrt.d", II_SQRT_D, fsqrt>, ROUND_W_FM_MM<1, 0x28>;
|
| D | MipsSEISelLowering.cpp | 151 setOperationAction(ISD::FSQRT, MVT::f16, Promote); in MipsSETargetLowering()
395 setOperationAction(ISD::FSQRT, Ty, Legal); in addMSAFloatType()
1921 return DAG.getNode(ISD::FSQRT, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| D | MipsInstrFPU.td | 510 defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>, ISA_MIPS2;
|
| /third_party/node/deps/v8/src/diagnostics/ppc/ |
| D | disasm-ppc.cc | 1335 case FSQRT: { in DecodeExt4()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | constants-mips.h | 823 FSQRT = (3U << 17), enumerator
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1715 setOperationAction(ISD::FSQRT, MVT::f128, Legal); in SparcTargetLowering()
1740 setOperationAction(ISD::FSQRT, MVT::f128, Custom); in SparcTargetLowering()
1792 setOperationAction(ISD::FSQRT, MVT::f32, Promote); in SparcTargetLowering()
3046 case ISD::FSQRT: return LowerF128Op(Op, DAG, in LowerOperation()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | constants-mips64.h | 872 FSQRT = (3U << 17), enumerator
|
| /third_party/node/deps/v8/src/diagnostics/mips/ |
| D | disasm-mips.cc | 2602 case FSQRT: in DecodeTypeMsa2RF()
|
| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| D | disasm-mips64.cc | 2889 case FSQRT: in DecodeTypeMsa2RF()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 207 setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); in WebAssemblyTargetLowering()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | constants-arm64.h | 1179 FSQRT = FSQRT_s, enumerator
|
| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 767 #define FSQRT CHOICE(fsqrt, fsqrt, fsqrt) macro
1480 #define FSQRT fsqrt macro
|