| /third_party/node/deps/v8/src/compiler/backend/loong64/ |
| D | code-generator-loong64.cc | 999 i.InputInt8(2), t7); in AssembleArchInstruction()
1004 i.InputInt8(2), t7); in AssembleArchInstruction()
1062 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
1065 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1067 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
1070 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
1075 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
1079 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1081 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
1084 i.InputInt8(1) + i.InputInt8(2) - 1, i.InputInt8(1)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| D | code-generator-riscv64.cc | 2002 __ VU.set(kScratchReg, i.InputInt8(2), m1); in AssembleArchInstruction()
2010 __ VU.set(kScratchReg, i.InputInt8(2), m1); in AssembleArchInstruction()
2015 __ VU.set(kScratchReg, i.InputInt8(2), i.InputInt8(3)); in AssembleArchInstruction()
2016 switch (i.InputInt8(2)) { in AssembleArchInstruction()
2114 __ VU.set(kScratchReg, i.InputInt8(2), i.InputInt8(3)); in AssembleArchInstruction()
2125 __ VU.set(kScratchReg, i.InputInt8(2), i.InputInt8(3)); in AssembleArchInstruction()
2232 i.InputInt8(1)); in AssembleArchInstruction()
2241 i.InputInt8(1)); in AssembleArchInstruction()
2248 i.InputInt8(1)); in AssembleArchInstruction()
2257 i.InputInt8(1)); in AssembleArchInstruction()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| D | code-generator-mips64.cc | 1025 i.InputInt8(2)); in AssembleArchInstruction()
1030 i.InputInt8(2)); in AssembleArchInstruction()
1121 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1122 i.InputInt8(2)); in AssembleArchInstruction()
1125 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1126 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1128 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1129 i.InputInt8(2)); in AssembleArchInstruction()
1133 __ Dext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1134 i.InputInt8(2)); in AssembleArchInstruction()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/ |
| D | code-generator-impl.h | 61 int8_t InputInt8(size_t index) { in InputInt8() function
66 return bit_cast<uint8_t>(InputInt8(index)); in InputUint8()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| D | code-generator-mips.cc | 1121 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1122 i.InputInt8(2)); in AssembleArchInstruction()
1125 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { in AssembleArchInstruction()
1126 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1128 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1129 i.InputInt8(2)); in AssembleArchInstruction()
1153 i.InputInt8(2)); in AssembleArchInstruction()
1995 i.InputInt8(1)); in AssembleArchInstruction()
2005 __ insert_w(dst, i.InputInt8(1), i.InputRegister(2)); in AssembleArchInstruction()
2114 __ copy_u_w(kScratchReg, i.InputSimd128Register(0), i.InputInt8(1) * 2); in AssembleArchInstruction()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| D | code-generator-arm.cc | 1137 __ bfc(i.OutputRegister(), i.InputInt8(1), i.InputInt8(2)); in AssembleArchInstruction()
1143 __ ubfx(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1144 i.InputInt8(2)); in AssembleArchInstruction()
1150 __ sbfx(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), in AssembleArchInstruction()
1151 i.InputInt8(2)); in AssembleArchInstruction()
1823 i.InputInt8(1)); in AssembleArchInstruction()
1828 i.InputDoubleRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
2053 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2172 i.InputInt8(1)); in AssembleArchInstruction()
2177 i.InputFloatRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/ppc/ |
| D | code-generator-ppc.cc | 2227 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2235 Operand((3 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2243 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2250 Operand((3 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2257 Operand((7 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2264 Operand((7 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2271 Operand(15 - i.InputInt8(1))); in AssembleArchInstruction()
2277 Operand(15 - i.InputInt8(1))); in AssembleArchInstruction()
2288 __ vinsd(dst, r0, Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
2292 Operand((1 - i.InputInt8(1)) * lane_width_in_bytes)); in AssembleArchInstruction()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | code-generator-arm64.cc | 2246 i.InputSimd128Register(0).Format(src_f), i.InputInt8(1)); in AssembleArchInstruction()
2256 __ Mov(dst, i.InputInt8(1), i.InputSimd128Register(2).Format(f), 0); in AssembleArchInstruction()
2309 i.InputSimd128Register(1).Format(s_f), i.InputInt8(2)); in AssembleArchInstruction()
2339 __ Mov(dst, i.InputSimd128Register(0).Format(f), i.InputInt8(1)); in AssembleArchInstruction()
2351 __ Mov(dst, i.InputInt8(1), src2); in AssembleArchInstruction()
2495 i.InputInt8(1)); in AssembleArchInstruction()
2501 i.InputInt8(1)); in AssembleArchInstruction()
2667 __ Ssra(dst, i.InputSimd128Register(1).Format(f), i.InputInt8(2) & mask); in AssembleArchInstruction()
2778 int laneidx = i.InputInt8(1); in AssembleArchInstruction()
2785 int laneidx = i.InputInt8(1); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| D | code-generator-ia32.cc | 543 int8_t laneidx = i.InputInt8(1); \
1573 __ mov_b(operand, i.InputInt8(index)); in AssembleArchInstruction()
1779 i.InputDoubleRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
1975 int8_t lane = i.InputInt8(1); in AssembleArchInstruction()
2111 i.InputOperand(2), i.InputInt8(1) << 4); in AssembleArchInstruction()
2116 i.InputInt8(1) << 4); in AssembleArchInstruction()
2234 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
3148 ASSEMBLE_SIMD_IMM_SHUFFLE(pblendw, SSE4_1, i.InputInt8(2)); in AssembleArchInstruction()
3166 ASSEMBLE_SIMD_IMM_SHUFFLE(palignr, SSSE3, i.InputInt8(2)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| D | code-generator-x64.cc | 2347 Immediate value(Immediate(i.InputInt8(index))); in AssembleArchInstruction()
2757 i.InputDoubleRegister(2), i.InputInt8(1)); in AssembleArchInstruction()
2868 byte select = i.InputInt8(1) << 4 & 0x30; in AssembleArchInstruction()
3028 __ Pextrq(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
3159 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
4006 uint8_t lane = i.InputInt8(1) & 0x7; in AssembleArchInstruction()
4020 uint8_t lane = i.InputInt8(1) & 0xf; in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/s390/ |
| D | code-generator-s390.cc | 2737 __ name(i.Output##dtype(), i.InputSimd128Register(0), i.InputInt8(1), \ in AssembleArchInstruction()
2756 i.Input##stype(2), i.InputInt8(1), kScratchReg); \ in AssembleArchInstruction()
|