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Searched refs:Intrinsics (Results 1 – 25 of 45) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceIntrinsics.cpp29 static_assert(sizeof(Intrinsics::IntrinsicInfo) == 4,
32 bool Intrinsics::isMemoryOrderValid(IntrinsicID ID, uint64_t Order, in isMemoryOrderValid()
79 Intrinsics::ValidateIntrinsicValue
80 Intrinsics::FullIntrinsicInfo::validateIntrinsic(const InstIntrinsic *Intrinsic, in validateIntrinsic()
86 return Intrinsics::BadReturnType; in validateIntrinsic()
88 return Intrinsics::BadReturnType; in validateIntrinsic()
91 return Intrinsics::WrongNumOfArgs; in validateIntrinsic()
96 return Intrinsics::WrongArgType; in validateIntrinsic()
99 return Intrinsics::IsValidIntrinsic; in validateIntrinsic()
102 Type Intrinsics::FullIntrinsicInfo::getArgType(SizeT Index) const { in getArgType()
DIceTargetLoweringMIPS32.cpp259 return Intrinsics::MemoryOrderInvalid; in getConstantMemoryOrder()
583 Intrinsics::IntrinsicID ID = Intrinsic->getIntrinsicID(); in genTargetHelperCallFor()
584 if (isVectorType(DestTy) && ID == Intrinsics::Fabs) { in genTargetHelperCallFor()
586 Intrinsics::IntrinsicInfo Info = Intrinsic->getIntrinsicInfo(); in genTargetHelperCallFor()
614 case Intrinsics::AtomicLoad: { in genTargetHelperCallFor()
617 if (!Intrinsics::isMemoryOrderValid( in genTargetHelperCallFor()
636 case Intrinsics::AtomicStore: { in genTargetHelperCallFor()
640 if (!Intrinsics::isMemoryOrderValid( in genTargetHelperCallFor()
659 case Intrinsics::AtomicCmpxchg: { in genTargetHelperCallFor()
662 if (!Intrinsics::isMemoryOrderValid( in genTargetHelperCallFor()
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DIceTargetLoweringX8664.cpp658 return Intrinsics::MemoryOrderInvalid; in getConstantMemoryOrder()
703 Intrinsics::IntrinsicID ID = Intrin->getIntrinsicID(); in doLoadOpt()
704 if (ID == Intrinsics::AtomicLoad && in doLoadOpt()
705 Intrinsics::isMemoryOrderValid( in doLoadOpt()
3325 switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicID()) { in lowerIntrinsic()
3326 case Intrinsics::AtomicCmpxchg: { in lowerIntrinsic()
3327 if (!Intrinsics::isMemoryOrderValid( in lowerIntrinsic()
3342 case Intrinsics::AtomicFence: in lowerIntrinsic()
3343 if (!Intrinsics::isMemoryOrderValid( in lowerIntrinsic()
3350 case Intrinsics::AtomicFenceAll: in lowerIntrinsic()
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DIceTargetLoweringARM32.cpp717 Intrinsics::IntrinsicID ID = Intrinsic->getIntrinsicID(); in genTargetHelperCallFor()
721 case Intrinsics::Ctpop: { in genTargetHelperCallFor()
737 case Intrinsics::Longjmp: { in genTargetHelperCallFor()
749 case Intrinsics::Memcpy: { in genTargetHelperCallFor()
764 case Intrinsics::Memmove: { in genTargetHelperCallFor()
777 case Intrinsics::Memset: { in genTargetHelperCallFor()
800 case Intrinsics::Setjmp: { in genTargetHelperCallFor()
4637 return Intrinsics::MemoryOrderInvalid; in getConstantMemoryOrder()
4681 case Intrinsics::AtomicExchange: in createArithInst()
4683 case Intrinsics::AtomicAdd: in createArithInst()
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DIceTargetLoweringX8632.cpp649 return Intrinsics::MemoryOrderInvalid; in getConstantMemoryOrder()
692 Intrinsics::IntrinsicID ID = Intrin->getIntrinsicID(); in doLoadOpt()
693 if (ID == Intrinsics::AtomicLoad && in doLoadOpt()
695 Intrinsics::isMemoryOrderValid( in doLoadOpt()
3769 switch (Intrinsics::IntrinsicID ID = Instr->getIntrinsicID()) { in lowerIntrinsic()
3770 case Intrinsics::AtomicCmpxchg: { in lowerIntrinsic()
3771 if (!Intrinsics::isMemoryOrderValid( in lowerIntrinsic()
3786 case Intrinsics::AtomicFence: in lowerIntrinsic()
3787 if (!Intrinsics::isMemoryOrderValid( in lowerIntrinsic()
3794 case Intrinsics::AtomicFenceAll: in lowerIntrinsic()
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DIceConverter.cpp561 const Ice::Intrinsics::FullIntrinsicInfo *Info = in convertCallInstruction()
614 const Ice::Intrinsics::FullIntrinsicInfo *I) { in validateIntrinsic()
617 case Ice::Intrinsics::IsValidCall: in validateIntrinsic()
619 case Ice::Intrinsics::BadReturnType: { in validateIntrinsic()
627 case Ice::Intrinsics::WrongNumOfArgs: { in validateIntrinsic()
635 case Ice::Intrinsics::WrongCallArgType: { in validateIntrinsic()
DIceIntrinsics.h28 namespace Intrinsics {
DIceInst.h624 const Intrinsics::IntrinsicInfo &Info) { in create()
635 Intrinsics::IntrinsicInfo getIntrinsicInfo() const { return Info; } in getIntrinsicInfo()
636 Intrinsics::IntrinsicID getIntrinsicID() const { return Info.ID; } in getIntrinsicID()
643 const Intrinsics::IntrinsicInfo &Info) in InstIntrinsic()
646 const Intrinsics::IntrinsicInfo Info;
DIceTargetLowering.cpp338 if (Intrinsic->getIntrinsicID() == Intrinsics::LoadSubVector) in doAddressOpt()
340 else if (Intrinsic->getIntrinsicID() == Intrinsics::StoreSubVector) in doAddressOpt()
/third_party/skia/src/sksl/ir/
DSkSLFunctionCall.cpp343 namespace Intrinsics { namespace
453 Intrinsics::evaluate_radians); in optimize_intrinsic_call()
456 Intrinsics::evaluate_degrees); in optimize_intrinsic_call()
459 Intrinsics::evaluate_sin); in optimize_intrinsic_call()
462 Intrinsics::evaluate_cos); in optimize_intrinsic_call()
465 Intrinsics::evaluate_tan); in optimize_intrinsic_call()
468 Intrinsics::evaluate_sinh); in optimize_intrinsic_call()
471 Intrinsics::evaluate_cosh); in optimize_intrinsic_call()
474 Intrinsics::evaluate_tanh); in optimize_intrinsic_call()
477 Intrinsics::evaluate_asin); in optimize_intrinsic_call()
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/third_party/skia/third_party/externals/swiftshader/src/Reactor/
DSubzeroReactor.cpp273 Ice::Intrinsics::MemoryOrder stdToIceMemoryOrder(std::memory_order memoryOrder) in stdToIceMemoryOrder()
277 case std::memory_order_relaxed: return Ice::Intrinsics::MemoryOrderRelaxed; in stdToIceMemoryOrder()
278 case std::memory_order_consume: return Ice::Intrinsics::MemoryOrderConsume; in stdToIceMemoryOrder()
279 case std::memory_order_acquire: return Ice::Intrinsics::MemoryOrderAcquire; in stdToIceMemoryOrder()
280 case std::memory_order_release: return Ice::Intrinsics::MemoryOrderRelease; in stdToIceMemoryOrder()
281 case std::memory_order_acq_rel: return Ice::Intrinsics::MemoryOrderAcquireRelease; in stdToIceMemoryOrder()
282 case std::memory_order_seq_cst: return Ice::Intrinsics::MemoryOrderSequentiallyConsistent; in stdToIceMemoryOrder()
284 return Ice::Intrinsics::MemoryOrderInvalid; in stdToIceMemoryOrder()
1439Intrinsics::IntrinsicInfo intrinsic = { Ice::Intrinsics::LoadSubVector, Ice::Intrinsics::SideEffec… in createLoad()
1510Intrinsics::IntrinsicInfo intrinsic = { Ice::Intrinsics::StoreSubVector, Ice::Intrinsics::SideEffe… in createStore()
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DOptimizer.cpp663 if(instrinsic->getIntrinsicID() == Ice::Intrinsics::LoadSubVector) in asLoadSubVector()
676 if(instrinsic->getIntrinsicID() == Ice::Intrinsics::StoreSubVector) in asStoreSubVector()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsics.td1 //===- Intrinsics.td - Defines all LLVM intrinsics ---------*- tablegen -*-===//
332 //===--------------- Variable Argument Handling Intrinsics ----------------===//
340 //===------------------- Garbage Collection Intrinsics --------------------===//
351 //===------------------- ObjC ARC runtime Intrinsics --------------------===//
423 //===--------------------- Code Generator Intrinsics ----------------------===//
506 //===------------------- Standard C Library Intrinsics --------------------===//
592 //===--------------- Constrained Floating Point Intrinsics ----------------===//
766 //===------------------------- Expect Intrinsics --------------------------===//
771 //===-------------------- Bit Manipulation Intrinsics ---------------------===//
790 //===------------------------ Debugger Intrinsics -------------------------===//
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DIntrinsicsXCore.td94 // Intrinsics for events.
104 // Intrinsics for threads.
DCMakeLists.txt4 set(LLVM_TARGET_DEFINITIONS Intrinsics.td)
DIntrinsicsRISCV.td16 // Atomic Intrinsics have multiple versions for different access widths, which
DIntrinsicsAMDGPU.td136 // ABI Special Intrinsics
197 // Instruction Intrinsics
1510 // CI+ Intrinsics
1522 // VI Intrinsics
1566 // GFX10 Intrinsics
1829 // Special Intrinsics for backend internal use only. No frontend
DIntrinsicsPowerPC.td37 // Intrinsics used to generate ctr-based loops. These should only be
46 // Intrinsics for [double]word extended forms of divide instructions
705 // Power8 Intrinsics
935 // PowerPC QPX Intrinsics.
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/
Dmodule.install.modulemap16 textual header "IR/Intrinsics.gen"
17 textual header "IR/Intrinsics.inc"
Dmodule.modulemap224 // Intrinsics.h because they need to be generated by tablegen first.
245 // Intrinsics.h
259 header "IR/Intrinsics.h"
/third_party/mesa3d/src/compiler/nir/
DREADME61 Intrinsics
65 or is not referentially transparent is represented by an intrinsic. Intrinsics
74 - Intrinsics can be marked as side-effect free, which permits them to be
79 Intrinsics are used for:
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineTables.td2 include "llvm/IR/Intrinsics.td"
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMSA.txt4 Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUGISel.td191 // FIXME: Intrinsics aren't marked as commutable, so we need to add an explcit
/third_party/mesa3d/docs/drivers/
Dllvmpipe.rst243 - `Intel Intrinsics

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