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Searched refs:IsKill (Results 1 – 21 of 21) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16RegisterInfo.cpp125 bool IsKill = false; in eliminateFI() local
141 IsKill = true; in eliminateFI()
143 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
DMipsSERegisterInfo.cpp200 bool IsKill = false; in eliminateFI() local
235 IsKill = true; in eliminateFI()
252 IsKill = true; in eliminateFI()
256 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); in eliminateFI()
DMipsSEFrameLowering.cpp833 bool IsKill = !IsRAAndRetAddrIsTaken; in spillCalleeSavedRegisters() local
835 TII.storeRegToStackSlot(MBB, MI, Reg, IsKill, in spillCalleeSavedRegisters()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp126 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
140 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp206 bool IsKill = false; in eliminateFrameIndex() local
232 IsKill = true; in eliminateFrameIndex()
235 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, IsKill); in eliminateFrameIndex()
DHexagonFrameLowering.cpp1268 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); in insertCSRSpillsInBlock() local
1271 HII.storeRegToStackSlot(MBB, MI, Reg, IsKill, FI, RC, &HRI); in insertCSRSpillsInBlock()
1272 if (IsKill) in insertCSRSpillsInBlock()
1633 bool IsKill = MI->getOperand(2).isKill(); in expandStoreInt() local
1642 .addReg(SrcR, getKillRegState(IsKill)); in expandStoreInt()
1696 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVecPred() local
1711 .addReg(SrcR, getKillRegState(IsKill)) in expandStoreVecPred()
1785 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec2() local
1805 .addReg(SrcLo, getKillRegState(IsKill)) in expandStoreVec2()
1816 .addReg(SrcHi, getKillRegState(IsKill)) in expandStoreVec2()
[all …]
DHexagonBlockRanges.cpp326 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local
329 if (IsKill) in computeInitialLiveRanges()
DHexagonFrameLowering.h169 bool IsDef, bool IsKill) const;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp548 bool IsKill) { in spillVGPRtoAGPR() argument
569 .addReg(Src, getKillRegState(IsKill)); in spillVGPRtoAGPR()
618 bool IsKill, in buildSpillLoadStore() argument
696 SrcDstRegState |= getKillRegState(IsKill); in buildSpillLoadStore()
699 auto MIB = spillVGPRtoAGPR(ST, MI, Index, i, SubReg, IsKill); in buildSpillLoadStore()
706 .addReg(SubReg, getKillRegState(IsKill)); in buildSpillLoadStore()
716 .addReg(SubReg, getDefRegState(!IsStore) | getKillRegState(IsKill)) in buildSpillLoadStore()
763 bool IsKill = MI->getOperand(0).isKill(); in spillSGPR() local
785 unsigned SubKillState = getKillRegState((NumSubRegs == 1) && IsKill); in spillSGPR()
805 .addReg(SubReg, getKillRegState(IsKill)) in spillSGPR()
[all …]
DSIShrinkInstructions.cpp251 bool IsKill = NewAddrDwords == Info->VAddrDwords; in shrinkMIMG() local
264 IsKill = false; in shrinkMIMG()
298 MI.getOperand(VAddr0Idx).setIsKill(IsKill); in shrinkMIMG()
DSIInstrInfo.cpp1656 bool IsKill = RegOp.isKill(); in swapRegAndNonRegOperand() local
1668 NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug); in swapRegAndNonRegOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy() argument
278 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
DAArch64InstrInfo.cpp2825 unsigned SrcReg, bool IsKill, in storeRegPairToStackSlot() argument
2837 .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0) in storeRegPairToStackSlot()
2838 .addReg(SrcReg1, getKillRegState(IsKill), SubIdx1) in storeRegPairToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.h57 unsigned SourceRegister, bool IsKill, int FrameIndex,
DLanaiInstrInfo.cpp51 unsigned SourceRegister, bool IsKill, int FrameIndex, in storeRegToStackSlot() argument
63 .addReg(SourceRegister, getKillRegState(IsKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.h42 bool IsKill, int FrameIndex,
DRISCVInstrInfo.cpp115 unsigned SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/Unix/
DSignals.inc298 enum class SignalKind { IsKill, IsInfo };
307 case SignalKind::IsKill:
325 registerHandler(S, SignalKind::IsKill);
327 registerHandler(S, SignalKind::IsKill);
329 registerHandler(SIGPIPE, SignalKind::IsKill);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp401 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); in addVRegDefDeps() local
405 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask; in addVRegDefDeps()
1101 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills() local
1102 MO.setIsKill(IsKill); in toggleKills()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp868 bool IsKill = MO.isKill(); in MergeOpsUpdate() local
869 if (IsKill) in MergeOpsUpdate()
871 Regs.push_back(std::make_pair(Reg, IsKill)); in MergeOpsUpdate()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp794 bool IsKill = MI.getOperand(1).isKill(); in convertToThreeAddressWithLEA() local
801 .addReg(Src, getKillRegState(IsKill)); in convertToThreeAddressWithLEA()
872 if (IsKill) in convertToThreeAddressWithLEA()