| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 352 class BC_MMR6_DESC_BASE<string instr_asm, DAGOperand opnd, InstrItinClass Itin>
358 InstrItinClass Itinerary = Itin;
409 RegisterOperand GPROpnd, InstrItinClass Itin>
416 InstrItinClass Itinerary = Itin;
425 RegisterOperand GPROpnd, InstrItinClass Itin>
432 InstrItinClass Itinerary = Itin;
439 InstrItinClass Itin> : MMR6Arch<instr_asm> {
443 InstrItinClass Itinerary = Itin;
470 InstrItinClass Itin>
477 InstrItinClass Itinerary = Itin;
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| D | MipsInstrFPU.td | 108 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
112 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
117 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
119 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
120 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
126 InstrItinClass Itin, SDPatternOperator OpNode= null_frag> :
128 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
133 InstrItinClass Itin, bit IsComm,
137 [(set DstRC:$fd, (OpNode SrcRC:$fs, SrcRC:$ft))], Itin, FrmFR, opstr>,
142 multiclass ABSS_M<string opstr, InstrItinClass Itin,
[all …]
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| D | MicroMipsInstrInfo.td | 210 Operand MemOpnd, InstrItinClass Itin> :
214 Itin, FrmI> {
223 Operand MemOpnd, InstrItinClass Itin>:
226 [(OpNode RO:$rt, addrimm12:$addr)], Itin, FrmI> {
292 InstrItinClass Itin = NoItinerary, DAGOperand MO = mem_mm_12> :
295 [(set RO:$rt, (OpNode addrimm12:$addr))], Itin, FrmI, opstr> {
302 InstrItinClass Itin = NoItinerary,
306 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR> {
311 InstrItinClass Itin = NoItinerary> :
313 !strconcat(opstr, "\t$rd, $rs, $imm"), [], Itin, FrmI>;
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| D | MipsCondMov.td | 19 InstrItinClass Itin> :
21 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
27 InstrItinClass Itin> :
29 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
35 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
40 Itin, FrmFR, opstr>, HARDFLOAT {
45 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
50 Itin, FrmFR, opstr>, HARDFLOAT {
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| D | Mips32r6InstrInfo.td | 211 InstrItinClass Itin,
218 InstrItinClass Itinerary = Itin;
222 RegisterOperand FGROpnd, InstrItinClass Itin>{
225 CMP_CONDN_DESC_BASE<"af", Typestr, FGROpnd, Itin>,
229 CMP_CONDN_DESC_BASE<"un", Typestr, FGROpnd, Itin, setuo>,
233 CMP_CONDN_DESC_BASE<"eq", Typestr, FGROpnd, Itin,
239 CMP_CONDN_DESC_BASE<"ueq", Typestr, FGROpnd, Itin,
244 CMP_CONDN_DESC_BASE<"lt", Typestr, FGROpnd, Itin,
250 CMP_CONDN_DESC_BASE<"ult", Typestr, FGROpnd, Itin,
255 CMP_CONDN_DESC_BASE<"le", Typestr, FGROpnd, Itin,
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| D | MicroMipsInstrFPU.td | 13 multiclass ADDS_MMM<string opstr, InstrItinClass Itin, bit IsComm,
15 def _D32_MM : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>,
20 def _D64_MM : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
110 multiclass ABSS_MMM<string opstr, InstrItinClass Itin,
112 def _D32_MM : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>,
116 def _D64_MM : StdMMR6Rel, ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>,
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| D | MipsMTInstrInfo.td | 44 class MT_1R_DESC_BASE<string instr_asm, InstrItinClass Itin = NoItinerary> {
49 InstrItinClass Itinerary = Itin;
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| D | MipsInstrInfo.td | 1314 InstrItinClass Itin = NoItinerary,
1318 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1326 InstrItinClass Itin = NoItinerary,
1332 Itin, FrmI, opstr> {
1383 InstrItinClass Itin = NoItinerary,
1386 [(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
1394 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
1395 LoadMemory<opstr, RO, mem, OpNode, Itin, Addr>;
1399 InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
1401 [(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 262 const InstrItineraryData *Itin = DAG->getSchedModel()->getInstrItineraries(); in initialize() local
267 Top.HazardRec = TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
268 Bot.HazardRec = TII->CreateTargetMIHazardRecognizer(Itin, DAG); in initialize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineScheduler.cpp | 2731 const InstrItineraryData *Itin = SchedModel->getInstrItineraries(); in initialize() local
2735 Itin, DAG); in initialize()
2740 Itin, DAG); in initialize()
3337 const InstrItineraryData *Itin = SchedModel->getInstrItineraries(); in initialize() local
3341 Itin, DAG); in initialize()
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