Searched refs:LoadLatency (Results 1 – 25 of 61) sorted by relevance
123
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonScheduleV62.td | 30 let LoadLatency = 1;
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| D | HexagonScheduleV55.td | 41 let LoadLatency = 1;
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| D | HexagonScheduleV65.td | 33 let LoadLatency = 1;
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| D | HexagonScheduleV5.td | 39 let LoadLatency = 1;
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| D | HexagonScheduleV66.td | 33 let LoadLatency = 1;
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| D | HexagonScheduleV60.td | 74 let LoadLatency = 1;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiSchedule.td | 28 let LoadLatency = 2;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 285 unsigned LoadLatency; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCScheduleA2.td | 160 let LoadLatency = 6; // Optimistic load latency assuming bypass.
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| D | PPCScheduleG5.td | 119 let LoadLatency = 3; // Optimistic load latency assuming bypass.
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| D | PPCScheduleE500.td | 272 let LoadLatency = 5; // Optimistic load latency assuming bypass.
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| D | PPCScheduleE500mc.td | 327 let LoadLatency = 5; // Optimistic load latency assuming bypass.
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| D | PPCScheduleE5500.td | 371 let LoadLatency = 6; // Optimistic load latency assuming bypass.
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| D | PPCScheduleP7.td | 392 let LoadLatency = 3; // Optimistic load latency assuming bypass.
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| D | PPCScheduleP9.td | 26 let LoadLatency = 5;
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| D | PPCScheduleP8.td | 401 let LoadLatency = 3; // Optimistic load latency assuming bypass.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedFalkor.td | 22 let LoadLatency = 3; // Optimistic load latency.
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| D | AArch64SchedKryo.td | 22 let LoadLatency = 4; // Optimistic load latency
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| D | AArch64SchedThunderX.td | 23 let LoadLatency = 3; // Optimistic load latency.
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| D | AArch64SchedA53.td | 21 let LoadLatency = 3; // Optimistic load latency assuming bypass.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleM4.td | 16 let LoadLatency = 2; // Latency when not pipelined, not pc-relative
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVSchedRocket64.td | 17 let LoadLatency = 3;
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| D | RISCVSchedRocket32.td | 17 let LoadLatency = 3;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenSubtargetInfo.inc | 7820 5, // LoadLatency
7880 3, // LoadLatency
7895 6, // LoadLatency
7910 5, // LoadLatency
7925 5, // LoadLatency
7940 6, // LoadLatency
7955 3, // LoadLatency
7970 3, // LoadLatency
8018 5, // LoadLatency
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSchedule.td | 74 // Target hooks allow subtargets to associate LoadLatency and
83 int LoadLatency = -1; // Cycles for loads to access the cache.
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