| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.h | 81 MCInst const &MCI);
85 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
86 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI);
89 size_t bundleSize(MCInst const &MCI);
108 MCInst const &MCI);
111 unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI);
114 unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI);
116 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
130 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
134 MCInst const &MCI);
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| D | HexagonMCInstrInfo.cpp | 88 MCInst const &MCI) { in addConstExtender() argument
91 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI)); in addConstExtender()
95 new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MCI, exOp)); in addConstExtender()
96 XMCI->setLoc(MCI.getLoc()); in addConstExtender()
103 MCInst const &MCI) { in bundleInstructions() argument
104 assert(isBundle(MCI)); in bundleInstructions()
105 return make_range(Hexagon::PacketIterator(MCII, MCI), in bundleInstructions()
106 Hexagon::PacketIterator(MCII, MCI, nullptr)); in bundleInstructions()
110 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) { in bundleInstructions() argument
111 assert(isBundle(MCI)); in bundleInstructions()
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| D | HexagonMCDuplexInfo.cpp | 190 unsigned HexagonMCInstrInfo::getDuplexCandidateGroup(MCInst const &MCI) { in getDuplexCandidateGroup() argument
193 switch (MCI.getOpcode()) { in getDuplexCandidateGroup()
202 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
203 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
208 Hexagon::R29 == SrcReg && inRange<5, 2>(MCI, 2)) { in getDuplexCandidateGroup()
213 inRange<4, 2>(MCI, 2)) { in getDuplexCandidateGroup()
220 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
221 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
224 inRange<4>(MCI, 2)) { in getDuplexCandidateGroup()
241 DstReg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
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| D | HexagonMCCompound.cpp | 349 MCInst &MCI) { in lookForCompound() argument
350 assert(HexagonMCInstrInfo::isBundle(MCI)); in lookForCompound()
353 MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset; in lookForCompound()
354 J != MCI.end(); ++J) { in lookForCompound()
364 MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset; in lookForCompound()
365 B != MCI.end(); ++B) { in lookForCompound()
382 MCI.erase(B); in lookForCompound()
399 MCContext &Context, MCInst &MCI) { in tryCompound() argument
400 assert(HexagonMCInstrInfo::isBundle(MCI) && in tryCompound()
404 if (MCI.size() < 2) in tryCompound()
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| D | HexagonInstPrinter.cpp | 41 MCInst const &MCI = *I.getInst(); in printInst() local
42 if (HexagonMCInstrInfo::isDuplex(MII, MCI)) { in printInst()
43 printInstruction(MCI.getOperand(1).getInst(), Address, OS); in printInst()
46 printInstruction(MCI.getOperand(0).getInst(), Address, OS); in printInst()
48 printInstruction(&MCI, Address, OS); in printInst()
49 HasExtender = HexagonMCInstrInfo::isImmext(MCI); in printInst()
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| D | HexagonMCChecker.cpp | 66 void HexagonMCChecker::initReg(MCInst const &MCI, unsigned R, unsigned &PredReg, in initReg() argument
68 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && isPredicateRegister(R)) { in initReg()
71 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI); in initReg()
74 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI)) in initReg()
86 void HexagonMCChecker::init(MCInst const &MCI) { in init() argument
87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init()
93 if (MCI.getOperand(i).isReg()) in init()
94 initReg(MCI, MCI.getOperand(i).getReg(), PredReg, isTrue); in init()
96 initReg(MCI, MCID.getImplicitUses()[i], PredReg, isTrue); in init()
120 HexagonMCInstrInfo::isPredicateLate(MCII, MCI)) in init()
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| D | HexagonMCELFStreamer.cpp | 70 MCInst *MCI = const_cast<MCInst *>(I.getInst()); in EmitInstruction() local
71 EmitSymbol(*MCI); in EmitInstruction()
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| D | HexagonAsmBackend.cpp | 577 MCInst &MCI = const_cast<MCInst &>(HexagonMCInstrInfo::instruction( in fixupNeedsRelaxationAdvanced() local
579 bool Relaxable = isInstRelaxable(MCI); in fixupNeedsRelaxationAdvanced()
597 *RelaxTarget = &MCI; in fixupNeedsRelaxationAdvanced()
635 *RelaxTarget = &MCI; in fixupNeedsRelaxationAdvanced()
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| D | HexagonMCCodeEmitter.h | 83 uint32_t parseBits(size_t Last, MCInst const &MCB, MCInst const &MCI) const;
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| D | HexagonMCCodeEmitter.cpp | 341 MCInst const &MCI) const { in parseBits()
342 bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI); in parseBits()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 218 static Error verifyOperands(const MCInstrDesc &MCDesc, const MCInst &MCI) { in verifyOperands() argument
222 for (I = 0, E = MCI.getNumOperands(); NumExplicitDefs && I < E; ++I) { in verifyOperands()
223 const MCOperand &Op = MCI.getOperand(I); in verifyOperands()
230 "Expected more register operand definitions.", MCI); in verifyOperands()
235 const MCOperand &Op = MCI.getOperand(MCDesc.getNumOperands() - 1); in verifyOperands()
236 if (I == MCI.getNumOperands() || !Op.isReg()) { in verifyOperands()
240 return make_error<InstructionError<MCInst>>(Message, MCI); in verifyOperands()
247 void InstrBuilder::populateWrites(InstrDesc &ID, const MCInst &MCI, in populateWrites() argument
249 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateWrites()
302 unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands(); in populateWrites()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/ |
| D | InstrBuilder.h | 51 Expected<const InstrDesc &> createInstrDescImpl(const MCInst &MCI);
52 Expected<const InstrDesc &> getOrCreateInstrDesc(const MCInst &MCI);
57 void populateWrites(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
58 void populateReads(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
59 Error verifyInstrDesc(const InstrDesc &ID, const MCInst &MCI) const;
71 Expected<std::unique_ptr<Instruction>> createInstruction(const MCInst &MCI);
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| D | Support.h | 32 InstructionError(std::string M, const T &MCI) in InstructionError() argument
33 : Message(std::move(M)), Inst(MCI) {} in InstructionError()
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| /third_party/libphonenumber/resources/carrier/en/ |
| D | 98.txt | 20 9891|IR-MCI
26 98990|IR-MCI
27 98991|IR-MCI
28 98994|IR-MCI
29 98996|IR-MCI
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonMCInstLower.cpp | 107 MCInst *MCI = new (AP.OutContext) MCInst; in HexagonLowerToMC() local
108 MCI->setOpcode(MI->getOpcode()); in HexagonLowerToMC()
109 assert(MCI->getOpcode() == static_cast<unsigned>(MI->getOpcode()) && in HexagonLowerToMC()
175 MCI->addOperand(MCO); in HexagonLowerToMC()
177 AP.HexagonProcessInstruction(*MCI, *MI); in HexagonLowerToMC()
178 HexagonMCInstrInfo::extendIfNeeded(AP.OutContext, MCII, MCB, *MCI); in HexagonLowerToMC()
179 MCB.addOperand(MCOperand::createInst(MCI)); in HexagonLowerToMC()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | Lint.cpp | 327 MemCpyInst *MCI = cast<MemCpyInst>(&I); in visitCallSite() local
329 visitMemoryReference(I, MCI->getDest(), MemoryLocation::UnknownSize, in visitCallSite()
330 MCI->getDestAlignment(), nullptr, MemRef::Write); in visitCallSite()
331 visitMemoryReference(I, MCI->getSource(), MemoryLocation::UnknownSize, in visitCallSite()
332 MCI->getSourceAlignment(), nullptr, MemRef::Read); in visitCallSite()
339 dyn_cast<ConstantInt>(findValue(MCI->getLength(), in visitCallSite()
343 Assert(AA->alias(MCI->getSource(), Size, MCI->getDest(), Size) != in visitCallSite()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 126 void canonicalizeImmediates(MCInst &MCI);
531 void HexagonAsmParser::canonicalizeImmediates(MCInst &MCI) { in canonicalizeImmediates() argument
533 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates()
534 for (MCOperand &I : MCI) in canonicalizeImmediates()
542 Warning(MCI.getLoc(), "Signed/Unsigned mismatch"); in canonicalizeImmediates()
545 MCI = NewInst; in canonicalizeImmediates()
548 bool HexagonAsmParser::matchOneInstruction(MCInst &MCI, SMLoc IDLoc, in matchOneInstruction() argument
554 MatchInstructionImpl(InstOperands, MCI, ErrorInfo, MatchingInlineAsm); in matchOneInstruction()
556 MCI.setLoc(IDLoc); in matchOneInstruction()
557 canonicalizeImmediates(MCI); in matchOneInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | IRBuilder.cpp | 180 auto* MCI = cast<MemCpyInst>(CI); in CreateMemCpy() local
182 MCI->setDestAlignment(*DstAlign); in CreateMemCpy()
184 MCI->setSourceAlignment(*SrcAlign); in CreateMemCpy()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1308 MCInst MCI; in LowerPATCHABLE_OP() local
1309 MCI.setOpcode(Opcode); in LowerPATCHABLE_OP()
1312 MCI.addOperand(MaybeOperand.getValue()); in LowerPATCHABLE_OP()
1317 CodeEmitter->encodeInstruction(MCI, VecOS, Fixups, getSubtargetInfo()); in LowerPATCHABLE_OP()
1326 MCI.setOpcode(X86::PUSH64rmr); in LowerPATCHABLE_OP()
1335 OutStreamer->EmitInstruction(MCI, getSubtargetInfo()); in LowerPATCHABLE_OP()
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| D | X86FastISel.cpp | 2725 const MemCpyInst *MCI = cast<MemCpyInst>(II); in fastLowerIntrinsicCall() local
2727 if (MCI->isVolatile()) in fastLowerIntrinsicCall()
2730 if (isa<ConstantInt>(MCI->getLength())) { in fastLowerIntrinsicCall()
2733 uint64_t Len = cast<ConstantInt>(MCI->getLength())->getZExtValue(); in fastLowerIntrinsicCall()
2736 if (!X86SelectAddress(MCI->getRawDest(), DestAM) || in fastLowerIntrinsicCall()
2737 !X86SelectAddress(MCI->getRawSource(), SrcAM)) in fastLowerIntrinsicCall()
2745 if (!MCI->getLength()->getType()->isIntegerTy(SizeWidth)) in fastLowerIntrinsicCall()
2748 if (MCI->getSourceAddressSpace() > 255 || MCI->getDestAddressSpace() > 255) in fastLowerIntrinsicCall()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 1141 if (auto *MCI = dyn_cast<MemCpyInst>(&CI)) { in translateMemFunc() local
1142 DstAlign = std::max<unsigned>(MCI->getDestAlignment(), 1); in translateMemFunc()
1143 SrcAlign = std::max<unsigned>(MCI->getSourceAlignment(), 1); in translateMemFunc()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 5845 const auto &MCI = cast<MemCpyInst>(I); in visitIntrinsicCall() local
5850 unsigned DstAlign = std::max<unsigned>(MCI.getDestAlignment(), 1); in visitIntrinsicCall()
5851 unsigned SrcAlign = std::max<unsigned>(MCI.getSourceAlignment(), 1); in visitIntrinsicCall()
5853 bool isVol = MCI.isVolatile(); in visitIntrinsicCall()
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| /third_party/NuttX/ |
| D | ReleaseNotes | 1283 * A DMA driver and a high speed MCI driver for the Atmel AT91SAM3U
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| /third_party/chromium/patch/ |
| D | 0003-ohos-1115.patch | 199893 zbjie$=_TedQzuU{4>f1?{Iq6St;MCI%{KGUVg8k7uf0&2S~9+Lbjd99vifBUmzd#!
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