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Searched refs:MRMDestReg (Results 1 – 12 of 12) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrVMX.td51 def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
54 def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
DX86InstrShiftRotate.td661 def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst),
666 def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst),
671 def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst),
676 def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst),
681 def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst),
686 def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst),
694 def SHLD16rri8 : Ii8<0xA4, MRMDestReg,
701 def SHRD16rri8 : Ii8<0xAC, MRMDestReg,
708 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
715 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
[all …]
DX86InstrSystem.td114 def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
117 def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
133 def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
136 def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
165 def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
167 def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
169 def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
DX86InstrInfo.td1534 def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
1536 def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
1538 def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
1540 def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
1770 def MOV8rr_NOREX : I<0x88, MRMDestReg,
1804 def BT16rr : I<0xA3, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
1808 def BT32rr : I<0xA3, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
1812 def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
1872 def BTC16rr : I<0xBB, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1875 def BTC32rr : I<0xBB, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
[all …]
DX86InstrMPX.td60 def BNDMOVrr_REV : I<0x1B, MRMDestReg, (outs BNDR:$dst), (ins BNDR:$src),
DX86InstrMMX.td189 def MMX_MOVD64grr : MMXI<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR64:$src),
207 def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg,
216 def MMX_MOVQ64rr_REV : MMXI<0x7F, MRMDestReg, (outs VR64:$dst), (ins VR64:$src),
DX86InstrSSE.td202 def rr_REV : SI<0x11, MRMDestReg, (outs VR128:$dst),
439 def VMOVAPSrr_REV : VPSI<0x29, MRMDestReg, (outs VR128:$dst),
443 def VMOVAPDrr_REV : VPDI<0x29, MRMDestReg, (outs VR128:$dst),
447 def VMOVUPSrr_REV : VPSI<0x11, MRMDestReg, (outs VR128:$dst),
451 def VMOVUPDrr_REV : VPDI<0x11, MRMDestReg, (outs VR128:$dst),
458 def VMOVAPSYrr_REV : VPSI<0x29, MRMDestReg, (outs VR256:$dst),
462 def VMOVAPDYrr_REV : VPDI<0x29, MRMDestReg, (outs VR256:$dst),
466 def VMOVUPSYrr_REV : VPSI<0x11, MRMDestReg, (outs VR256:$dst),
470 def VMOVUPDYrr_REV : VPDI<0x11, MRMDestReg, (outs VR256:$dst),
513 def MOVAPSrr_REV : PSI<0x29, MRMDestReg, (outs VR128:$dst), (ins VR128:$src),
[all …]
DX86InstrAVX512.td782 defm rr : AVX512_maskable_split<Opcode, MRMDestReg, To, (outs To.RC:$dst),
1083 def VEXTRACTPSZrr : AVX512AIi8<0x17, MRMDestReg, (outs GR32:$dst),
3481 def rr_REV : AVX512PI<opc, MRMDestReg, (outs _.RC:$dst), (ins _.RC:$src),
3486 def rrk_REV : AVX512PI<opc, MRMDestReg, (outs _.RC:$dst),
3493 def rrkz_REV : AVX512PI<opc, MRMDestReg, (outs _.RC:$dst),
3837 def VMOVSDto64Zrr : AVX512BI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64X:$src),
3856 def VMOVPDI2DIZrr : AVX512BI<0x7E, MRMDestReg, (outs GR32:$dst), (ins VR128X:$src),
3872 def VMOVPQIto64Zrr : I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128X:$src),
3894 def VMOVPQI2QIZrr : AVX512BI<0xD6, MRMDestReg, (outs VR128X:$dst),
3911 def VMOVSS2DIZrr : AVX512BI<0x7E, MRMDestReg, (outs GR32:$dst),
[all …]
DX86InstrFormats.td40 def MRMDestReg : Format<48>;
DX86InstrArithmetic.td643 : ITy<opcode, MRMDestReg, typeinfo, outlist,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h632 MRMDestReg = 48, enumerator
1048 case X86II::MRMDestReg: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1059 case X86II::MRMDestReg: { in emitVEXOpcodePrefix()
1214 case X86II::MRMDestReg: in determineREXPrefix()
1473 case X86II::MRMDestReg: { in encodeInstruction()