/third_party/node/deps/v8/src/compiler/backend/mips/ |
D | instruction-scheduler-mips.cc | 488 MUL_D = 5, enumerator 703 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency() 711 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency() 727 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency() 1780 return Latency::MUL_D; in GetInstructionLatency()
|
/third_party/node/deps/v8/src/codegen/loong64/ |
D | constants-loong64.h | 359 MUL_D = 0x3bU << 15, enumerator 1097 case MUL_D: in InstructionType()
|
D | assembler-loong64.cc | 1158 GenRegister(MUL_D, rk, rj, rd); in mul_d()
|
/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
D | instruction-scheduler-riscv64.cc | 518 MUL_D = 5, enumerator 1322 return Latency::MUL_D; in GetInstructionLatency()
|
/third_party/node/deps/v8/src/compiler/backend/mips64/ |
D | instruction-scheduler-mips64.cc | 517 MUL_D = 5, enumerator 1518 return Latency::MUL_D; in GetInstructionLatency()
|
/third_party/node/deps/v8/src/diagnostics/loong64/ |
D | disasm-loong64.cc | 1100 case MUL_D: in DecodeTypekOp17()
|
/third_party/node/deps/v8/src/codegen/mips/ |
D | constants-mips.h | 639 MUL_D = ((0U << 3) + 2), enumerator
|
D | assembler-mips.cc | 2553 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
|
/third_party/node/deps/v8/src/codegen/mips64/ |
D | constants-mips64.h | 684 MUL_D = ((0U << 3) + 2), enumerator
|
D | assembler-mips64.cc | 2820 GenInstrRegister(COP1, S, ft, fs, fd, MUL_D); in mul_s() 2824 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
|
/third_party/node/deps/v8/src/diagnostics/mips/ |
D | disasm-mips.cc | 1022 case MUL_D: in DecodeTypeRegisterRsType()
|
/third_party/node/deps/v8/src/diagnostics/mips64/ |
D | disasm-mips64.cc | 1094 case MUL_D: in DecodeTypeRegisterRsType()
|
/third_party/node/deps/v8/src/execution/loong64/ |
D | simulator-loong64.cc | 3618 case MUL_D: in DecodeTypeOp17()
|
/third_party/node/deps/v8/src/execution/mips/ |
D | simulator-mips.cc | 2806 case MUL_D: in DecodeTypeRegisterDRsType()
|
/third_party/node/deps/v8/src/execution/mips64/ |
D | simulator-mips64.cc | 3187 case MUL_D: in DecodeTypeRegisterDRsType()
|