| /third_party/lzma/CPP/7zip/Compress/ |
| D | PpmdEncoder.cpp | 22 if (MemSize == (UInt32)(Int32)-1) in Normalize()
23 MemSize = (UInt32)1 << (level + 19); in Normalize()
25 if (MemSize / kMult > ReduceSize) in Normalize()
32 if (MemSize > m) in Normalize()
33 MemSize = m; in Normalize()
106 props.MemSize = v; in SetCoderProperties()
135 SetUi32(props + 1, _props.MemSize); in WriteCoderProperties()
150 if (!Ppmd7_Alloc(&_ppmd, _props.MemSize, &g_BigAlloc)) in Code()
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| D | PpmdEncoder.h | 19 UInt32 MemSize; member
25 MemSize = (UInt32)(Int32)-1; in CEncProps()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 668 unsigned MemSize = Query.MMODescrs[0].SizeInBits; in AMDGPULegalizerInfo() local
671 if (MemSize < DstTy.getSizeInBits()) in AMDGPULegalizerInfo()
672 MemSize = std::max(MemSize, Align); in AMDGPULegalizerInfo()
674 if (DstTy.isVector() && DstTy.getSizeInBits() > MemSize) in AMDGPULegalizerInfo()
679 if (MemSize > maxSizeForAddrSpace(AS)) in AMDGPULegalizerInfo()
684 unsigned NumRegs = MemSize / 32; in AMDGPULegalizerInfo()
688 if (Align < MemSize) { in AMDGPULegalizerInfo()
690 return !TLI->allowsMisalignedMemoryAccessesImpl(MemSize, AS, Align / 8); in AMDGPULegalizerInfo()
760 unsigned MemSize = Query.MMODescrs[0].SizeInBits; in AMDGPULegalizerInfo() local
763 if (DstSize > MemSize) in AMDGPULegalizerInfo()
[all …]
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| D | AMDGPUInstructionSelector.cpp | 826 const unsigned MemSize, in getBufferStoreOpcode() argument
829 switch (8 * MemSize) { in getBufferStoreOpcode()
846 const unsigned MemSize, in getBufferStoreFormatOpcode() argument
849 bool IsD16Unpacked = 8 * MemSize < Ty.getSizeInBits(); in getBufferStoreFormatOpcode()
984 const int MemSize = MMO->getSize(); in selectStoreIntrinsic() local
995 MMO = MF.getMachineMemOperand(MMO, TotalOffset, MemSize); in selectStoreIntrinsic()
999 int Opc = IsFormat ? getBufferStoreFormatOpcode(Ty, MemSize, Offen) : in selectStoreIntrinsic()
1000 getBufferStoreOpcode(Ty, MemSize, Offen); in selectStoreIntrinsic()
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| D | AMDGPURegisterBankInfo.cpp | 1376 const int MemSize = (*MI.memoperands_begin())->getSize(); in selectStoreIntrinsic() local
1390 switch (8 * MemSize) { in selectStoreIntrinsic()
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| /third_party/skia/third_party/externals/imgui/examples/example_marmalade/data/ |
| D | app.icf | 20 MemSize=6000000
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 548 int64_t MemSize = 0; in foldMemoryOperand() local
553 MemSize = MFI.getObjectSize(FI); in foldMemoryOperand()
564 MemSize = std::max(MemSize, OpSize); in foldMemoryOperand()
568 assert(MemSize && "Did not expect a zero-sized stack slot"); in foldMemoryOperand()
595 MachinePointerInfo::getFixedStack(MF, FI), Flags, MemSize, in foldMemoryOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizerInfo.h | 173 uint64_t MemSize; member
179 MemSize == Other.MemSize;
187 MemSize == Other.MemSize; in isCompatible()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 883 int MemSize = TII->getMemScale(*Paired); in mergePairedInsns() local
889 PairedOffset /= MemSize; in mergePairedInsns()
891 PairedOffset *= MemSize; in mergePairedInsns()
1497 int MemSize = TII->getMemScale(MI); in findMatchingInsn() local
1501 if (MIOffset % MemSize) { in findMatchingInsn()
1507 MIOffset /= MemSize; in findMatchingInsn()
1509 MIOffset *= MemSize; in findMatchingInsn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsLegalizerInfo.cpp | 23 unsigned MemSize; member
35 if (Val.MemSize != Query.MMODescrs[0].SizeInBits) in CheckTy0Ty1MemSizeAlign()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | WasmTranslator.cpp | 1190 Node MemSize(uint32_t Offset) { in MemSize() function in IceBuilder
1364 SizeT MemSize = Module->module->min_mem_pages * WASM_PAGE_SIZE; in sanitizeAddress() local
1371 if (RealOffset >= MemSize) { in sanitizeAddress()
1404 Ctx->getConstantInt32(MemSize))); in sanitizeAddress()
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| /third_party/node/deps/v8/src/codegen/ |
| D | machine-type.h | 311 constexpr byte MemSize() const { in MemSize() function
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| D | code-stub-assembler.cc | 15258 int bits = mt.MemSize() * 8; in Store()
15281 int size = mt.MemSize(); in OverallOffset()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ObjectYAML/ |
| D | ELFYAML.h | 98 Optional<llvm::yaml::Hex64> MemSize; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 2361 unsigned MemSize = HII.getMemAccessSize(MI); in optimizeSpillSlots() local
2365 CopyOpc = (MemSize == 1) ? Hexagon::A2_sxtb : Hexagon::A2_sxth; in optimizeSpillSlots()
2367 CopyOpc = (MemSize == 1) ? Hexagon::A2_zxtb : Hexagon::A2_zxth; in optimizeSpillSlots()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ObjectYAML/ |
| D | ELFEmitter.cpp | 753 PHeader.p_memsz = YamlPhdr.MemSize ? uint64_t(*YamlPhdr.MemSize) in setProgramHeaderLayout()
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| D | ELFYAML.cpp | 849 IO.mapOptional("MemSize", Phdr.MemSize); in mapping()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3584 unsigned MemSize = ResVT.getSizeInBits()/8; in fastLowerCall() local
3585 int FI = MFI.CreateStackObject(MemSize, MemSize, false); in fastLowerCall()
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| D | X86ISelLowering.cpp | 19464 unsigned MemSize = DstTy.getStoreSize(); in FP_TO_INTHelper() local
19465 int SSFI = MF.getFrameInfo().CreateStackObject(MemSize, MemSize, false); in FP_TO_INTHelper()
19544 assert(FLDSize <= MemSize && "Stack slot not big enough"); in FP_TO_INTHelper()
19553 MPI, MachineMemOperand::MOStore, MemSize, MemSize); in FP_TO_INTHelper()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1028 unsigned MemSize = MemN->getMemoryVT().getSizeInBits() / 8; in SelectAddrMode6() local
1029 if (MMOAlign >= MemSize && MemSize > 1) in SelectAddrMode6()
1030 Alignment = MemSize; in SelectAddrMode6()
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| /third_party/node/deps/v8/src/compiler/ |
| D | wasm-compiler.cc | 4037 uint8_t access_size = memtype.MemSize(); in LoadLane()
4079 : memtype.MemSize(); in LoadTransform()
4117 memtype.MemSize(), index, offset, position, kCanOmitBoundsCheck); in LoadMem()
5316 Node* index = CheckBoundsAndAlignment(info.machine_type.MemSize(), inputs[0], in AtomicOp()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | instruction-selector-arm64.cc | 661 opcode |= LaneSizeField::encode(params.rep.MemSize() * kBitsPerByte); in VisitLoadLane()
|