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Searched refs:OPERAND_REG_IMM_INT64 (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIDefines.h128 OPERAND_REG_IMM_INT64, enumerator
DSIInstrInfo.h739 AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32; in isInlineConstant()
DSIInstrInfo.cpp2862 case AMDGPU::OPERAND_REG_IMM_INT64: in isInlineConstant()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp245 case AMDGPU::OPERAND_REG_IMM_INT64: in getLitEncoding()
DAMDGPUInstPrinter.cpp531 case AMDGPU::OPERAND_REG_IMM_INT64: in printOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h606 case AMDGPU::OPERAND_REG_IMM_INT64: in getOperandSize()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp1478 case AMDGPU::OPERAND_REG_IMM_INT64: in getOpFltSemantics()
1717 case AMDGPU::OPERAND_REG_IMM_INT64: in addLiteralImmOperand()
1803 case AMDGPU::OPERAND_REG_IMM_INT64: in addLiteralImmOperand()