/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 784 const MCConstantExpr *OffsetImm; // Offset immediate value member 1042 if(!Memory.OffsetImm || Memory.OffsetRegNum) return false; in isThumbMemPC() 1044 Val = Memory.OffsetImm->getValue(); in isThumbMemPC() 1386 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffset() 1398 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT2() 1410 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT2NoSp() 1422 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT() 1432 if (!Memory.OffsetImm) return true; in isMemPCRelImm12() 1433 int64_t Val = Memory.OffsetImm->getValue(); in isMemPCRelImm12() 1517 if (!Memory.OffsetImm) return true; in isAddrMode2() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | Thumb2SizeReduction.cpp | 570 unsigned OffsetImm = 0; in ReduceLoadStore() local 572 OffsetImm = MI->getOperand(2).getImm(); in ReduceLoadStore() 575 if ((OffsetImm & (Scale - 1)) || OffsetImm > MaxOffset) in ReduceLoadStore() 594 MIB.addImm(OffsetImm / Scale); in ReduceLoadStore()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64LoadStoreOptimizer.cpp | 710 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergeNarrowZeroStores() local 713 assert(((OffsetImm & 1) == 0) && "Unexpected offset to merge"); in mergeNarrowZeroStores() 714 OffsetImm /= 2; in mergeNarrowZeroStores() 724 .addImm(OffsetImm) in mergeNarrowZeroStores() 909 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergePairedInsns() local 912 assert(!(OffsetImm % TII->getMemScale(*RtMI)) && in mergePairedInsns() 914 OffsetImm /= TII->getMemScale(*RtMI); in mergePairedInsns() 946 .addImm(OffsetImm) in mergePairedInsns()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringARM32.cpp | 5567 int32_t OffsetImm = 0; in formAddressingMode() local 5604 dumpAddressOpt(Func, BaseVar, OffsetImm, OffsetReg, OffsetRegShamt, in formAddressingMode() 5609 if (matchAssign(VMetadata, &BaseVar, &OffsetImm, &Reason)) { in formAddressingMode() 5614 matchAssign(VMetadata, &OffsetReg, &OffsetImm, &Reason)) { in formAddressingMode() 5637 if (matchOffsetBase(VMetadata, &BaseVar, &OffsetImm, &Reason)) { in formAddressingMode() 5653 Context.insert<InstAssign>(BaseVar, Ctx->getConstantInt32(OffsetImm)); in formAddressingMode() 5654 OffsetImm = 0; in formAddressingMode() 5655 } else if (OffsetImm != 0) { in formAddressingMode() 5659 const int32_t PositiveOffset = OffsetImm > 0 ? OffsetImm : -OffsetImm; in formAddressingMode() 5661 OffsetImm > 0 ? InstArithmetic::Add : InstArithmetic::Sub; in formAddressingMode() [all …]
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D | IceTargetLoweringMIPS32.cpp | 5304 int32_t OffsetImm = 0; in formAddressingMode() local 5327 dumpAddressOpt(Func, BaseVar, OffsetImm, Reason); in formAddressingMode() 5331 if (matchAssign(VMetadata, &BaseVar, &OffsetImm, &Reason)) { in formAddressingMode() 5335 if (matchOffsetBase(VMetadata, &BaseVar, &OffsetImm, &Reason)) { in formAddressingMode() 5345 Context.insert<InstAssign>(BaseVar, Ctx->getConstantInt32(OffsetImm)); in formAddressingMode() 5346 OffsetImm = 0; in formAddressingMode() 5347 } else if (OffsetImm != 0) { in formAddressingMode() 5350 const int32_t PositiveOffset = OffsetImm > 0 ? OffsetImm : -OffsetImm; in formAddressingMode() 5352 OffsetImm > 0 ? InstArithmetic::Add : InstArithmetic::Sub; in formAddressingMode() 5354 if (!OperandMIPS32Mem::canHoldOffset(Ty, ZeroExt, OffsetImm)) { in formAddressingMode() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.h | 432 int64_t OffsetImm) const;
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D | PPCInstrInfo.cpp | 2546 int64_t OffsetImm = 0; in foldFrameOffset() local 2551 if (!isImmInstrEligibleForFolding(MI, ToBeDeletedReg, XFormOpcode, OffsetImm, in foldFrameOffset() 2574 if (isValidToBeChangedReg(ADDMI, 1, ADDIMI, OffsetAddi, OffsetImm)) in foldFrameOffset() 2576 else if (isValidToBeChangedReg(ADDMI, 2, ADDIMI, OffsetAddi, OffsetImm)) in foldFrameOffset() 2606 ADDIMI->getOperand(2).setImm(OffsetAddi + OffsetImm); in foldFrameOffset() 2649 int64_t &OffsetImm, in isImmInstrEligibleForFolding() argument 2684 OffsetImm = ImmOperand.getImm(); in isImmInstrEligibleForFolding() 2692 int64_t OffsetImm) const { in isValidToBeChangedReg() 2726 if (isInt<16>(OffsetAddi + OffsetImm)) in isValidToBeChangedReg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 271 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local 273 if (OffsetImm) { in getMemOperandWithOffset() 281 Offset = OffsetImm->getImm(); in getMemOperandWithOffset() 340 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local 343 Offset = OffsetImm->getImm(); in getMemOperandWithOffset() 351 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local 354 Offset = OffsetImm->getImm(); in getMemOperandWithOffset() 365 const MachineOperand *OffsetImm = in getMemOperandWithOffset() local 367 if (!OffsetImm) in getMemOperandWithOffset() 372 Offset = OffsetImm->getImm(); in getMemOperandWithOffset()
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