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Searched refs:OpNum (Results 1 – 25 of 66) sorted by relevance

123

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMInstPrinter.h47 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
49 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,
52 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,
54 void printAddrModeTBH(const MCInst *MI, unsigned OpNum,
56 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum,
58 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum,
60 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
62 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
65 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum,
67 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
[all …]
DARMInstPrinter.cpp351 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, in printThumbLdrLabelOperand() argument
354 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
381 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, in printSORegRegOperand() argument
384 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
385 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
386 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
401 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, in printSORegImmOperand() argument
404 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
405 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
491 unsigned OpNum, in printAddrMode2OffsetOperand() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZInstPrinter.cpp70 static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { in printUImmOperand() argument
71 int64_t Value = MI->getOperand(OpNum).getImm(); in printUImmOperand()
77 static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { in printSImmOperand() argument
78 int64_t Value = MI->getOperand(OpNum).getImm(); in printSImmOperand()
83 void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum, in printU1ImmOperand() argument
85 printUImmOperand<1>(MI, OpNum, O); in printU1ImmOperand()
88 void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum, in printU2ImmOperand() argument
90 printUImmOperand<2>(MI, OpNum, O); in printU2ImmOperand()
93 void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum, in printU3ImmOperand() argument
95 printUImmOperand<3>(MI, OpNum, O); in printU3ImmOperand()
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DSystemZMCCodeEmitter.cpp67 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum,
70 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum,
73 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum,
76 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
79 uint64_t getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum,
82 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum,
85 uint64_t getBDRAddr12Encoding(const MCInst &MI, unsigned OpNum,
88 uint64_t getBDVAddr12Encoding(const MCInst &MI, unsigned OpNum,
97 uint64_t getPCRelEncoding(const MCInst &MI, unsigned OpNum,
102 uint64_t getPC16DBLEncoding(const MCInst &MI, unsigned OpNum, in getPC16DBLEncoding() argument
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DSystemZInstPrinter.h48 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
49 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
50 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
51 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
52 void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
53 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
54 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
55 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
56 void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
57 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.h72 void printAddSubImm(const MCInst *MI, unsigned OpNum,
75 void printLogicalImm(const MCInst *MI, unsigned OpNum,
77 void printShifter(const MCInst *MI, unsigned OpNum,
79 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
81 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
83 void printArithExtend(const MCInst *MI, unsigned OpNum,
86 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
89 void printMemExtend(const MCInst *MI, unsigned OpNum, in printMemExtend() argument
91 printMemExtend(MI, OpNum, O, SrcRegKind, Width); in printMemExtend()
94 void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
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DAArch64InstPrinter.cpp733 int OpNum = LdStDesc->ListOperand; in printInst() local
734 printVectorList(MI, OpNum++, STI, O, ""); in printInst()
737 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; in printInst()
740 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst()
745 unsigned Reg = MI->getOperand(OpNum++).getReg(); in printInst()
933 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum, in printAddSubImm() argument
936 const MCOperand &MO = MI->getOperand(OpNum); in printAddSubImm()
941 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); in printAddSubImm()
944 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
951 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRAsmPrinter.cpp48 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
51 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
85 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() argument
89 bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); in PrintAsmOperand()
96 const MachineOperand &RegOp = MI->getOperand(OpNum); in PrintAsmOperand()
104 unsigned OpFlags = MI->getOperand(OpNum - 1).getImm(); in PrintAsmOperand()
118 Reg = MI->getOperand(OpNum + RegIdx).getReg(); in PrintAsmOperand()
131 printOperand(MI, OpNum, O); in PrintAsmOperand()
137 unsigned OpNum, const char *ExtraCode, in PrintAsmMemoryOperand() argument
143 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmMemoryOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/MCTargetDesc/
DNVPTXInstPrinter.cpp98 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, in printCvtMode() argument
100 const MCOperand &MO = MI->getOperand(OpNum); in printCvtMode()
148 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, in printCmpMode() argument
150 const MCOperand &MO = MI->getOperand(OpNum); in printCmpMode()
221 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum, in printLdStCode() argument
224 const MCOperand &MO = MI->getOperand(OpNum); in printLdStCode()
273 void NVPTXInstPrinter::printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, in printMmaCode() argument
275 const MCOperand &MO = MI->getOperand(OpNum); in printMmaCode()
287 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum, in printMemOperand() argument
289 printOperand(MI, OpNum, O); in printMemOperand()
[all …]
DNVPTXInstPrinter.h37 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O,
39 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O,
41 void printLdStCode(const MCInst *MI, int OpNum,
43 void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O,
45 void printMemOperand(const MCInst *MI, int OpNum,
47 void printProtoIdent(const MCInst *MI, int OpNum,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRDFOpt.cpp96 void removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum);
189 void HexagonDCE::removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum) { in removeOperand() argument
204 MI->RemoveOperand(OpNum); in removeOperand()
208 if (N < OpNum) in removeOperand()
210 else if (N > OpNum) in removeOperand()
224 unsigned OpNum, NewOpc; in rewrite() local
228 OpNum = 1; in rewrite()
232 OpNum = 1; in rewrite()
236 OpNum = 1; in rewrite()
240 OpNum = 0; in rewrite()
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DHexagonSubtarget.cpp350 for (unsigned OpNum = 0; OpNum < DDst->getNumOperands(); OpNum++) { in adjustSchedDependency() local
351 const MachineOperand &MO = DDst->getOperand(OpNum); in adjustSchedDependency()
353 UseIdx = OpNum; in adjustSchedDependency()
425 for (unsigned OpNum = 0; OpNum < SrcI->getNumOperands(); OpNum++) { in restoreLatency() local
426 const MachineOperand &MO = SrcI->getOperand(OpNum); in restoreLatency()
428 DefIdx = OpNum; in restoreLatency()
433 for (unsigned OpNum = 0; OpNum < DstI->getNumOperands(); OpNum++) { in restoreLatency() local
434 const MachineOperand &MO = DstI->getOperand(OpNum); in restoreLatency()
437 DefIdx, *DstI, OpNum)); in restoreLatency()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/MCTargetDesc/
DARCInstPrinter.cpp140 void ARCInstPrinter::printOperand(const MCInst *MI, unsigned OpNum, in printOperand() argument
142 const MCOperand &Op = MI->getOperand(OpNum); in printOperand()
157 void ARCInstPrinter::printMemOperandRI(const MCInst *MI, unsigned OpNum, in printMemOperandRI() argument
159 const MCOperand &base = MI->getOperand(OpNum); in printMemOperandRI()
160 const MCOperand &offset = MI->getOperand(OpNum + 1); in printMemOperandRI()
167 void ARCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, in printPredicateOperand() argument
170 const MCOperand &Op = MI->getOperand(OpNum); in printPredicateOperand()
175 void ARCInstPrinter::printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum, in printBRCCPredicateOperand() argument
177 const MCOperand &Op = MI->getOperand(OpNum); in printBRCCPredicateOperand()
DARCInstPrinter.h37 void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O);
38 void printOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
39 void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
40 void printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430AsmPrinter.cpp52 void printOperand(const MachineInstr *MI, int OpNum,
54 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
78 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, in printOperand() argument
80 const MachineOperand &MO = MI->getOperand(OpNum); in printOperand()
107 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, in printSrcMemOperand() argument
109 const MachineOperand &Base = MI->getOperand(OpNum); in printSrcMemOperand()
110 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand()
117 printOperand(MI, OpNum+1, O, "nohash"); in printSrcMemOperand()
122 printOperand(MI, OpNum, O); in printSrcMemOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Bitcode/Reader/
DBitcodeReader.cpp2584 unsigned OpNum = 0; in parseConstants() local
2588 PointeeType = getTypeByID(Record[OpNum++]); in parseConstants()
2593 uint64_t Op = Record[OpNum++]; in parseConstants()
2601 while (OpNum != Record.size()) { in parseConstants()
2603 Elt0FullTy = getFullyStructuredTypeByID(Record[OpNum]); in parseConstants()
2604 Type *ElTy = getTypeByID(Record[OpNum++]); in parseConstants()
2607 Elts.push_back(ValueList.getConstantFwdRef(Record[OpNum++], ElTy)); in parseConstants()
3336 unsigned OpNum = 0; in parseGlobalIndirectSymbolRecord() local
3337 Type *FullTy = getFullyStructuredTypeByID(Record[OpNum++]); in parseGlobalIndirectSymbolRecord()
3350 AddrSpace = Record[OpNum++]; in parseGlobalIndirectSymbolRecord()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFAsmPrinter.cpp45 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
48 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
72 void BPFAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, in printOperand() argument
74 const MachineOperand &MO = MI->getOperand(OpNum); in printOperand()
120 unsigned OpNum, const char *ExtraCode, in PrintAsmMemoryOperand() argument
122 assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands"); in PrintAsmMemoryOperand()
123 const MachineOperand &BaseMO = MI->getOperand(OpNum); in PrintAsmMemoryOperand()
124 const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1); in PrintAsmMemoryOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DDetectDeadLanes.cpp91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
172 unsigned OpNum = MI.getOperandNo(&MO); in isCrossCopy() local
173 DstSubIdx = MI.getOperand(OpNum+1).getImm(); in isCrossCopy()
232 unsigned OpNum = MI.getOperandNo(&MO); in transferUsedLanes() local
241 assert(OpNum % 2 == 1); in transferUsedLanes()
242 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferUsedLanes()
249 if (OpNum == 2) in transferUsedLanes()
261 assert(OpNum == 1); in transferUsedLanes()
265 assert(OpNum == 1); in transferUsedLanes()
295 unsigned OpNum = MI.getOperandNo(&Use); in transferDefinedLanesStep() local
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DBreakFalseDeps.cpp182 unsigned OpNum; in processDefs() local
183 unsigned Pref = TII->getUndefRegClearance(*MI, OpNum, TRI); in processDefs()
185 bool HadTrueDependency = pickBestRegisterForUndef(MI, OpNum, Pref); in processDefs()
189 if (!HadTrueDependency && shouldBreakDependence(MI, OpNum, Pref)) in processDefs()
190 UndefReads.push_back(std::make_pair(MI, OpNum)); in processDefs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/
DDwarfExpression.cpp374 uint64_t OpNum = Op->getOp(); in addExpression() local
376 if (OpNum >= dwarf::DW_OP_reg0 && OpNum <= dwarf::DW_OP_reg31) { in addExpression()
377 emitOp(OpNum); in addExpression()
379 } else if (OpNum >= dwarf::DW_OP_breg0 && OpNum <= dwarf::DW_OP_breg31) { in addExpression()
380 addBReg(OpNum - dwarf::DW_OP_breg0, Op->getArg(0)); in addExpression()
384 switch (OpNum) { in addExpression()
434 emitOp(OpNum); in addExpression()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMAsmPrinter.cpp199 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, in printOperand() argument
201 const MachineOperand &MO = MI->getOperand(OpNum); in printOperand()
262 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() argument
271 return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); in PrintAsmOperand()
274 printOperand(MI, OpNum, O); in PrintAsmOperand()
277 if (MI->getOperand(OpNum).isReg()) { in PrintAsmOperand()
278 Register Reg = MI->getOperand(OpNum).getReg(); in PrintAsmOperand()
292 if (!MI->getOperand(OpNum).isImm()) in PrintAsmOperand()
294 O << ~(MI->getOperand(OpNum).getImm()); in PrintAsmOperand()
297 if (!MI->getOperand(OpNum).isImm()) in PrintAsmOperand()
[all …]
DARMAsmPrinter.h76 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
79 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
81 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsAsmPrinter.cpp518 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() argument
524 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmOperand()
528 return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); in PrintAsmOperand()
568 if (OpNum == 0) in PrintAsmOperand()
570 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); in PrintAsmOperand()
586 unsigned RegOp = OpNum; in PrintAsmOperand()
592 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; in PrintAsmOperand()
595 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1; in PrintAsmOperand()
598 RegOp = OpNum + 1; in PrintAsmOperand()
619 printOperand(MI, OpNum, O); in PrintAsmOperand()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrDesc.h212 int getOperandConstraint(unsigned OpNum, in getOperandConstraint() argument
214 if (OpNum < NumOperands && in getOperandConstraint()
215 (OpInfo[OpNum].Constraints & (1 << Constraint))) { in getOperandConstraint()
217 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; in getOperandConstraint()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/MCParser/
DMCParsedAsmOperand.h48 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } in setMCOperandNum() argument

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