| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiCallingConv.td | 19 // Promote i8/i16 args to i32
32 // Promote i8/i16 args to i32
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| D | LanaiISelLowering.cpp | 136 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
137 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
138 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFCallingConv.td | 18 // Promote i8/i16/i32 args to i64
36 // Promote i8/i16/i32 args to i64
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| D | BPFISelLowering.cpp | 107 setOperationAction(ISD::BSWAP, MVT::i32, Promote); in BPFTargetLowering()
109 STI.getHasJmp32() ? Custom : Promote); in BPFTargetLowering()
124 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
125 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
126 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 81 // Promote i1/i8/i16/v1i1 arguments to i32.
84 // Promote v8i1/v16i1/v32i1 arguments to i32.
155 // Promote i1, v1i1, v8i1 arguments to i8.
158 // Promote v16i1 arguments to i16.
161 // Promote v32i1 arguments to i32.
312 // Promote all types to i32
369 // Promote all types to i64
378 // Promote all types to i64
420 // Promote all types to i64
504 // Promote i1/i8/i16/v1i1 arguments to i32.
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 128 setOperationAction(ISD::SETCC, MVT::f16, Promote); in MipsSETargetLowering()
129 setOperationAction(ISD::BR_CC, MVT::f16, Promote); in MipsSETargetLowering()
130 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in MipsSETargetLowering()
131 setOperationAction(ISD::SELECT, MVT::f16, Promote); in MipsSETargetLowering()
132 setOperationAction(ISD::FADD, MVT::f16, Promote); in MipsSETargetLowering()
133 setOperationAction(ISD::FSUB, MVT::f16, Promote); in MipsSETargetLowering()
134 setOperationAction(ISD::FMUL, MVT::f16, Promote); in MipsSETargetLowering()
135 setOperationAction(ISD::FDIV, MVT::f16, Promote); in MipsSETargetLowering()
136 setOperationAction(ISD::FREM, MVT::f16, Promote); in MipsSETargetLowering()
137 setOperationAction(ISD::FMA, MVT::f16, Promote); in MipsSETargetLowering()
[all …]
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| D | MipsCallingConv.td | 81 // Promote i8/i16 arguments to i32.
96 // Promote i1/i8/i16 return values to i32.
265 // Promote i8/i16 arguments to i32.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 66 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
67 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
68 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
122 setOperationAction(ISD::MUL, MVT::i8, Promote); in MSP430TargetLowering()
123 setOperationAction(ISD::MULHS, MVT::i8, Promote); in MSP430TargetLowering()
124 setOperationAction(ISD::MULHU, MVT::i8, Promote); in MSP430TargetLowering()
125 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
126 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
133 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
134 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
[all …]
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| D | MSP430CallingConv.td | 29 // Promote i8 arguments to i16.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 70 setOperationAction(ISD::LOAD, MVT::f32, Promote); in AMDGPUTargetLowering()
73 setOperationAction(ISD::LOAD, MVT::v2f32, Promote); in AMDGPUTargetLowering()
76 setOperationAction(ISD::LOAD, MVT::v3f32, Promote); in AMDGPUTargetLowering()
79 setOperationAction(ISD::LOAD, MVT::v4f32, Promote); in AMDGPUTargetLowering()
82 setOperationAction(ISD::LOAD, MVT::v5f32, Promote); in AMDGPUTargetLowering()
85 setOperationAction(ISD::LOAD, MVT::v8f32, Promote); in AMDGPUTargetLowering()
88 setOperationAction(ISD::LOAD, MVT::v16f32, Promote); in AMDGPUTargetLowering()
91 setOperationAction(ISD::LOAD, MVT::v32f32, Promote); in AMDGPUTargetLowering()
94 setOperationAction(ISD::LOAD, MVT::i64, Promote); in AMDGPUTargetLowering()
97 setOperationAction(ISD::LOAD, MVT::v2i64, Promote); in AMDGPUTargetLowering()
[all …]
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| D | SIISelLowering.cpp | 209 setOperationAction(ISD::SELECT, MVT::i1, Promote); in SITargetLowering()
211 setOperationAction(ISD::SELECT, MVT::f64, Promote); in SITargetLowering()
220 setOperationAction(ISD::SETCC, MVT::i1, Promote); in SITargetLowering()
294 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering()
297 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
300 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
303 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering()
373 setOperationAction(ISD::FPOW, MVT::f16, Promote); in SITargetLowering()
455 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Promote); in SITargetLowering()
458 setOperationAction(ISD::ROTR, MVT::i16, Promote); in SITargetLowering()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreCallingConv.td | 27 // Promote i8/i16 arguments to i32.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1406 setOperationAction(ISD::CTLZ, MVT::i8, Promote); in HexagonTargetLowering()
1407 setOperationAction(ISD::CTLZ, MVT::i16, Promote); in HexagonTargetLowering()
1408 setOperationAction(ISD::CTTZ, MVT::i8, Promote); in HexagonTargetLowering()
1409 setOperationAction(ISD::CTTZ, MVT::i16, Promote); in HexagonTargetLowering()
1412 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering()
1413 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering()
1414 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering()
1513 setOperationAction(ISD::SELECT, VT, Promote); in HexagonTargetLowering()
1591 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1592 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCCallingConv.td | 28 // Promote i8/i16 arguments to i32.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZCallingConv.td | 32 // Promote i32 to i64 if it has an explicit extension type.
89 // Promote i32 to i64 if it has an explicit extension type.
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| /third_party/skia/third_party/externals/egl-registry/extensions/KHR/ |
| D | EGL_KHR_platform_wayland.txt | 110 - Promote EGL_EXT_platform_wayland to KHR to go with EGL 1.5.
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| D | EGL_KHR_platform_gbm.txt | 295 - Promote EGL_MESA_platform_gbm to KHR to go with EGL 1.5.
|
| /third_party/EGL/extensions/KHR/ |
| D | EGL_KHR_platform_wayland.txt | 110 - Promote EGL_EXT_platform_wayland to KHR to go with EGL 1.5.
|
| D | EGL_KHR_platform_gbm.txt | 295 - Promote EGL_MESA_platform_gbm to KHR to go with EGL 1.5.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 117 Promote, // This operation should be executed in a larger type. enumerator
424 if (getOperationAction(ISD::LOAD, LoadMVT) == Promote && in isLoadBitCastBeneficial()
978 getOperationAction(Op, VT) == Promote); in isOperationLegalOrPromote()
988 getOperationAction(Op, VT) == Promote); in isOperationLegalOrCustomOrPromote()
1181 assert(Action != Promote && "Can't promote condition code!"); in getCondCodeAction()
1200 assert(getOperationAction(Op, VT) == Promote && in getTypeToPromoteTo()
1218 getOperationAction(Op, NVT) == Promote); in getTypeToPromoteTo()
2093 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 397 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering()
399 setOperationAction(ISD::FREM, MVT::f16, Promote); in AArch64TargetLowering()
402 setOperationAction(ISD::FPOW, MVT::f16, Promote); in AArch64TargetLowering()
405 setOperationAction(ISD::FPOWI, MVT::f16, Promote); in AArch64TargetLowering()
408 setOperationAction(ISD::FCOS, MVT::f16, Promote); in AArch64TargetLowering()
411 setOperationAction(ISD::FSIN, MVT::f16, Promote); in AArch64TargetLowering()
414 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in AArch64TargetLowering()
417 setOperationAction(ISD::FEXP, MVT::f16, Promote); in AArch64TargetLowering()
420 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in AArch64TargetLowering()
423 setOperationAction(ISD::FLOG, MVT::f16, Promote); in AArch64TargetLowering()
[all …]
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| /third_party/libdrm/include/drm/ |
| D | README | 92 Promote to fixed size ints, which match the current (32bit) ones.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 393 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
470 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
471 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); in NVPTXTargetLowering()
538 setFP16OperationAction(Op, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
557 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
574 setOperationAction(Op, MVT::f16, Promote); in NVPTXTargetLowering()
579 setOperationAction(ISD::FMINNUM, MVT::f16, Promote); in NVPTXTargetLowering()
580 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in NVPTXTargetLowering()
581 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
582 setOperationAction(ISD::FMAXIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 155 void Promote(SDNode *Node, SmallVectorImpl<SDValue> &Results);
497 case TargetLowering::Promote: in LegalizeOp()
499 Promote(Node, ResultVals); in LegalizeOp()
555 void VectorLegalizer::Promote(SDNode *Node, SmallVectorImpl<SDValue> &Results) { in Promote() function in VectorLegalizer
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcCallingConv.td | 105 // - Promote to integer or floating point registers depending on type.
|