| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 815 Register PtrReg = MI.getOperand(1).getReg(); in narrowScalar() local
820 MIRBuilder.buildLoad(TmpReg, PtrReg, MMO); in narrowScalar()
826 .addUse(PtrReg) in narrowScalar()
2075 Register PtrReg = MI.getOperand(1).getReg(); in lower() local
2108 LLT PtrTy = MRI.getType(PtrReg); in lower()
2114 MIRBuilder.buildLoad(LargeLdReg, PtrReg, *LargeMMO); in lower()
2120 MIRBuilder.buildPtrAdd(PtrAddReg, PtrReg, OffsetCst.getReg(0)); in lower()
2131 MIRBuilder.buildLoad(DstReg, PtrReg, MMO); in lower()
2139 MIRBuilder.buildLoad(TmpReg, PtrReg, MMO); in lower()
2167 Register PtrReg = MI.getOperand(1).getReg(); in lower() local
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 1984 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm() local
1987 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrReg); }, in selectSmrdImm()
2001 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm32() local
2007 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrReg); }, in selectSmrdImm32()
2033 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdSgpr() local
2038 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrReg); }, in selectSmrdSgpr()
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| D | AMDGPUCallLowering.cpp | 373 Register PtrReg = lowerParameterPtr(B, ParamTy, Offset); in lowerParameter() local
381 B.buildLoad(DstReg, PtrReg, *MMO); in lowerParameter()
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| D | AMDGPULegalizerInfo.cpp | 1782 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg() local
1787 MRI.getType(PtrReg).getAddressSpace()) && in legalizeAtomicCmpXChg()
1798 .addUse(PtrReg) in legalizeAtomicCmpXChg()
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| D | AMDGPURegisterBankInfo.cpp | 2356 Register PtrReg = MI.getOperand(1).getReg(); in getInstrMappingForLoad() local
2357 LLT PtrTy = MRI.getType(PtrReg); in getInstrMappingForLoad()
2364 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI); in getInstrMappingForLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1840 const Register PtrReg = I.getOperand(1).getReg(); in select() local
1842 const RegisterBank &PtrRB = *RBI.getRegBank(PtrReg, MRI, TRI); in select()
1846 assert(MRI.getType(PtrReg).isPointer() && in select()
1861 auto *PtrMI = MRI.getVRegDef(PtrReg); in select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 10782 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
10842 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitPartwordAtomicBinary()
10847 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitPartwordAtomicBinary()
10868 .addReg(PtrReg); in EmitPartwordAtomicBinary()
10912 .addReg(PtrReg); in EmitPartwordAtomicBinary()
11593 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
11663 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg) in EmitInstrWithCustomInserter()
11668 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg) in EmitInstrWithCustomInserter()
11700 .addReg(PtrReg); in EmitInstrWithCustomInserter()
11724 .addReg(PtrReg); in EmitInstrWithCustomInserter()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 4456 unsigned PtrReg = Use64BitPtr ? X86::RAX : X86::EAX; in Select() local
4457 SDValue Chain = CurDAG->getCopyToReg(Node->getOperand(0), dl, PtrReg, in Select()
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