| /third_party/skia/experimental/lowp-basic/ |
| D | lowp_experiments.cpp | 37 using Q15 = V<8, uint16_t>; typedef
43 Q15 a(i); in test_mm_mulhrs_epi16_simulation()
44 Q15 b(j); in test_mm_mulhrs_epi16_simulation()
45 Q15 simResult = simulate_ssse3_mm_mulhrs_epi16(a, b); in test_mm_mulhrs_epi16_simulation()
46 Q15 intrinsicResult = _mm_mulhrs_epi16(a, b); in test_mm_mulhrs_epi16_simulation()
60 static Q15 ssse3_vqrdmulhq_s16(Q15 a, Q15 b) { in ssse3_vqrdmulhq_s16()
61 constexpr Q15 limit(0x8000); in ssse3_vqrdmulhq_s16()
62 const Q15 product = _mm_mulhrs_epi16(a, b); in ssse3_vqrdmulhq_s16()
63 const Q15 eq = _mm_cmpeq_epi16(product, limit); in ssse3_vqrdmulhq_s16()
70 Q15 a(i); in test_ssse3_vqrdmulhq_s16()
[all …]
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| D | lerp-study.cpp | 43 Q15 qt(floor(t * 32768.f + 0.5f)); in saturating_lerp()
44 Q15 qa(a << logPixelScale); in saturating_lerp()
45 Q15 qb(b << logPixelScale); in saturating_lerp()
47 Q15 answer = simulate_neon_vqrdmulhq_s16(qt, qb - qa) + qa; in saturating_lerp()
54 Q15 qt(floor(t * 32768.f + 0.5f)); in ssse3_lerp()
55 Q15 qa(a << logPixelScale); in ssse3_lerp()
56 Q15 qb(b << logPixelScale); in ssse3_lerp()
58 Q15 answer = simulate_ssse3_mm_mulhrs_epi16(qt, qb - qa) + qa; in ssse3_lerp()
75 Q15 qt (floor(t * 65536.0f - 32768.0f + 0.5f)); in balanced_lerp()
77 Q15 qw ((b - a) << logPixelScale); in balanced_lerp()
[all …]
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| D | QMath.h | 29 using Q15 = V<8, uint16_t>; variable
58 static inline Q15 simulate_neon_vqrdmulhq_s16(Q15 a, Q15 b) { in simulate_neon_vqrdmulhq_s16()
59 Q15 result; in simulate_neon_vqrdmulhq_s16()
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| /third_party/ffmpeg/libavresample/ |
| D | audio_mix.c | 121 MIX_FUNC_GENERIC(S16P, Q15, int16_t, int32_t, int64_t, av_clip_int16(sum >> 15)) in MIX_FUNC_GENERIC()
303 0, 0, 1, 1, "C", MIX_FUNC_NAME(S16P, Q15)); in mix_function_init()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 86 case AArch64::Q15: in isOdd()
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| D | AArch64SchedPredicates.td | 185 CheckRegOperand<0, Q15>,
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| D | AArch64RegisterInfo.td | 403 def Q15 : AArch64Reg<15, "q15", [D15], ["v15", ""]>, DwarfRegAlias<B15>;
764 def Z15 : AArch64Reg<15, "z15", [Q15, Z15_HI]>, DwarfRegNum<[111]>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 210 {codeview::RegisterId::ARM64_Q15, AArch64::Q15}, in initLLVMToCVRegMapping()
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| D | AArch64InstPrinter.cpp | 1179 case AArch64::Q14: Reg = AArch64::Q15; break; in getNextVectorRegister()
1180 case AArch64::Q15: Reg = AArch64::Q16; break; in getNextVectorRegister()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 174 def Q15 : ARMReg<15, "q15", [D30, D31]>;
440 // Allocate non-VFP2 aliases Q8-Q15 first.
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| D | ARMInstrThumb2.td | 3715 Q0, Q1, Q2, Q3, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15],
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| D | ARMInstrInfo.td | 5701 Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15 ],
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 98 SP::Q7, SP::Q15, ~0U, ~0U } ;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 281 def Q15 : Rq<29, "F60", [D30, D31]>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 308 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
632 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 162 Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 };
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 156 Q15 = 136,
2660 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
2680 …, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15,
3917 { AArch64::Q15, 79U },
4196 { AArch64::Q15, 79U },
20418 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
20420 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
20422 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
20424 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
20446 …h64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArc…
[all …]
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| D | AArch64GenSubtargetInfo.inc | 14030 || MI->getOperand(0).getReg() == AArch64::Q15
14184 || MI->getOperand(0).getReg() == AArch64::Q15
14338 || MI->getOperand(0).getReg() == AArch64::Q15
14549 || MI->getOperand(0).getReg() == AArch64::Q15
14590 || MI->getOperand(0).getReg() == AArch64::Q15
16559 || MI->getOperand(0).getReg() == AArch64::Q15
16600 || MI->getOperand(0).getReg() == AArch64::Q15
19666 || MI->getOperand(0).getReg() == AArch64::Q15
19820 || MI->getOperand(0).getReg() == AArch64::Q15
19974 || MI->getOperand(0).getReg() == AArch64::Q15
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 582 case ARM::Q12: case ARM::Q13: case ARM::Q14: case ARM::Q15: in getMachineOpValue()
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| /third_party/libsnd/docs/ |
| D | FAQ.md | 342 ## Q15 : My program is crashing during a call to a function in libsndfile. Is this a bug in libsndf…
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 91 Q15 = 71,
2087 …1, ARM::D23_D24, ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30, ARM::Q15,
2107 …5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15,
6245 …{ ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, …
6281 …{ ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, …
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| D | ARMGenInstrInfo.inc | 5308 …RM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 };
5318 …RM::Q2, ARM::Q3, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 };
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| D | ARMGenAsmMatcher.inc | 9170 case ARM::Q15: OpKind = MCK_QPR; break;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1367 ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15
1387 ARM::Q15
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2105 .Case("v15", AArch64::Q15) in MatchNeonVectorRegName()
|