| /third_party/typescript/tests/baselines/reference/ |
| D | namespacesWithTypeAliasOnlyExportsMerge.symbols | 31 declare namespace Q3 {
32 >Q3 : Symbol(Q3, Decl(constAndNS.ts, 9, 27))
38 declare const try3: Q3.B;
40 >Q3 : Symbol(Q3, Decl(constAndNS.ts, 9, 27))
41 >B : Symbol(Q3.B, Decl(constAndNS.ts, 11, 12))
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| D | namespacesWithTypeAliasOnlyExportsMerge.types | 27 declare namespace Q3 {
32 declare const try3: Q3.B;
34 >Q3 : any
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| D | namespacesWithTypeAliasOnlyExportsMerge.js | 14 declare namespace Q3 {
17 declare const try3: Q3.B;
|
| /third_party/jerryscript/jerry-libm/ |
| D | expm1.c | 135 #define Q3 -7.93650757867487942473e-05 /* BF14CE19 9EAADBB7 */ macro
233 r1 = one + hxs * (Q1 + hxs * (Q2 + hxs * (Q3 + hxs * (Q4 + hxs * Q5)))); in expm1()
303 #undef Q3
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.td | 77 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
84 CCIfType<[f32], CCAssignToStackWithShadow<4, 4, [Q0, Q1, Q2, Q3]>>,
85 CCIfType<[f64], CCAssignToStackWithShadow<8, 4, [Q0, Q1, Q2, Q3]>>,
86 CCIfType<[v2f64], CCAssignToStackWithShadow<16, 4, [Q0, Q1, Q2, Q3]>>,
97 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
142 CCIfType<[f32], CCAssignToStackWithShadow<4, 4, [Q0, Q1, Q2, Q3]>>,
143 CCIfType<[f64], CCAssignToStackWithShadow<8, 8, [Q0, Q1, Q2, Q3]>>,
145 CCAssignToStackWithShadow<16, 16, [Q0, Q1, Q2, Q3]>>>,
146 CCIfType<[v2f64], CCAssignToStackWithShadow<16, 8, [Q0, Q1, Q2, Q3]>>
223 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
[all …]
|
| /third_party/typescript/tests/cases/compiler/ |
| D | namespacesWithTypeAliasOnlyExportsMerge.ts | 12 declare namespace Q3 { namespace
15 declare const try3: Q3.B;
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 104 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
106 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
108 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
111 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
113 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
146 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
148 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
150 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
153 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
155 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
[all …]
|
| /third_party/musl/porting/liteos_a/kernel/src/math/ |
| D | expm1l.c | 71 Q3 = 7.206038318724600171970199625081491823079E2L, variable
106 qx = (((( x + Q4) * x + Q3) * x + Q2) * x + Q1) * x + Q0; in expm1l()
|
| D | expm1.c | 117 Q3 = -7.93650757867487942473e-05, /* BF14CE19 9EAADBB7 */ variable
170 r1 = 1.0+hxs*(Q1+hxs*(Q2+hxs*(Q3+hxs*(Q4+hxs*Q5)))); in expm1()
|
| /third_party/musl/src/math/ |
| D | expm1l.c | 71 Q3 = 7.206038318724600171970199625081491823079E2L, variable
106 qx = (((( x + Q4) * x + Q3) * x + Q2) * x + Q1) * x + Q0; in expm1l()
|
| D | expm1.c | 117 Q3 = -7.93650757867487942473e-05, /* BF14CE19 9EAADBB7 */ variable
170 r1 = 1.0+hxs*(Q1+hxs*(Q2+hxs*(Q3+hxs*(Q4+hxs*Q5)))); in expm1()
|
| /third_party/skia/third_party/externals/icu/source/data/locales/ |
| D | lrc.txt | 250 "Q3",
262 "Q3",
270 "Q3",
|
| D | sv_FI.txt | 42 "Q3",
50 "Q3",
|
| D | es_DO.txt | 90 "Q3",
98 "Q3",
|
| D | haw.txt | 426 "Q3",
438 "Q3",
446 "Q3",
458 "Q3",
|
| D | se.txt | 545 "Q3",
557 "Q3",
565 "Q3",
577 "Q3",
|
| /third_party/icu/icu4c/source/data/locales/ |
| D | sv_FI.txt | 42 "Q3",
50 "Q3",
|
| D | lrc.txt | 270 "Q3",
282 "Q3",
290 "Q3",
|
| D | es_DO.txt | 110 "Q3",
118 "Q3",
|
| D | haw.txt | 452 "Q3",
464 "Q3",
472 "Q3",
484 "Q3",
|
| D | ks_Deva.txt | 238 "Q3",
252 "Q3",
|
| D | se.txt | 555 "Q3",
567 "Q3",
575 "Q3",
587 "Q3",
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVectorPrint.cpp | 76 || (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3); in isVecReg()
87 if (R >= Hexagon::Q0 && R <= Hexagon::Q3) { in getStringReg()
191 } else if (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3) { in runOnMachineFunction()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenCallingConv.inc | 271 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
284 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
297 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
316 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
333 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
515 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
528 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
541 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
560 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
576 …AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64…
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenCallingConv.inc | 184 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
193 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
203 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
213 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
278 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
535 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
565 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
574 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
583 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
744 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
[all …]
|