Searched refs:RSrc (Results 1 – 5 of 5) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ExecutionEngine/Orc/ |
D | OrcRemoteTargetServer.h | 352 Expected<std::vector<uint8_t>> handleReadMem(JITTargetAddress RSrc, in handleReadMem() argument 354 uint8_t *Src = reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(RSrc)); in handleReadMem() 357 << format("0x%016x", RSrc) << "\n"); in handleReadMem()
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPURegisterBankInfo.cpp | 1379 Register RSrc = MI.getOperand(2).getReg(); in selectStoreIntrinsic() local 1418 MIB.addUse(RSrc) in selectStoreIntrinsic() 2959 Register RSrc = MI.getOperand(2).getReg(); // SGPR in getInstrMapping() local 2963 unsigned Size2 = MRI.getType(RSrc).getSizeInBits(); in getInstrMapping() 2966 unsigned RSrcBank = getRegBankID(RSrc, MRI, *TRI); in getInstrMapping() 3141 Register RSrc = MI.getOperand(2).getReg(); // SGPR in getInstrMapping() local 3146 unsigned Size2 = MRI.getType(RSrc).getSizeInBits(); in getInstrMapping() 3150 unsigned RSrcBank = getRegBankID(RSrc, MRI, *TRI); in getInstrMapping()
|
D | AMDGPUInstructionSelector.cpp | 986 Register RSrc = MI.getOperand(2).getReg(); in selectStoreIntrinsic() local 1010 MIB.addUse(RSrc) in selectStoreIntrinsic()
|
D | AMDGPUISelDAGToDAG.cpp | 220 SDValue Addr, SDValue &RSrc, SDValue &VAddr,
|
D | SIInstrInfo.cpp | 334 const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc); in getMemOperandWithOffset() local 337 if (RSrc->getReg() != MFI->getScratchRSrcReg()) in getMemOperandWithOffset()
|