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Searched refs:R_028000_DB_RENDER_CONTROL (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/amd/common/
Dac_shadowed_regs.c80 R_028000_DB_RENDER_CONTROL,
81 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
295 R_028000_DB_RENDER_CONTROL,
296 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
636 R_028000_DB_RENDER_CONTROL,
637 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
947 R_028000_DB_RENDER_CONTROL,
948 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
1941 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlGfx9)); in gfx9_emulate_clear_state()
2649 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlNv10)); in gfx10_emulate_clear_state()
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/third_party/mesa3d/src/gallium/drivers/r600/
Devergreend.h1885 #define R_028000_DB_RENDER_CONTROL 0x00028000 macro
Devergreen_state.c2113 radeon_set_context_reg_seq(cs, R_028000_DB_RENDER_CONTROL, 2); in evergreen_emit_db_misc_state()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c1572 radeon_opt_set_context_reg2(sctx, R_028000_DB_RENDER_CONTROL, SI_TRACKED_DB_RENDER_CONTROL, in si_emit_db_render_state()
/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c5527 radeon_set_context_reg(ctx_cs, R_028000_DB_RENDER_CONTROL, ds_state->db_render_control); in radv_pipeline_emit_depth_stencil_state()