| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 44 RegBase, enumerator
60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
68 if (BaseType == X86AddressMode::RegBase) in getFullAddress()
97 AM.BaseType = X86AddressMode::RegBase; in getAddressFromInstr()
176 if (AM.BaseType == X86AddressMode::RegBase) in addFullAddress()
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| D | X86ISelDAGToDAG.cpp | 57 RegBase, enumerator
80 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
96 if (BaseType != RegBase) return false; in isRIPRelative()
104 BaseType = RegBase; in setBaseReg()
1547 AM.BaseType == X86ISelAddressMode::RegBase && in matchAddress()
1562 AM.BaseType == X86ISelAddressMode::RegBase && in matchAddress()
1595 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAdd()
1967 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAddressRecursively()
2043 if (AM.BaseType == X86ISelAddressMode::RegBase && in matchAddressRecursively()
2115 if ((AM.BaseType == X86ISelAddressMode::RegBase && AM.Base_Reg.getNode() && in matchAddressRecursively()
[all …]
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| D | X86FastISel.cpp | 3823 if (AM.BaseType == X86AddressMode::RegBase && in X86MaterializeGV()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 38 RegBase, enumerator
40 } BaseType = RegBase;
64 if (BaseType == RegBase && Base.Reg.getNode() != nullptr) { in dump()
169 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) { in MatchAddressBase()
175 AM.BaseType = MSP430ISelAddressMode::RegBase; in MatchAddressBase()
197 if (AM.BaseType == MSP430ISelAddressMode::RegBase in MatchAddress()
251 if (AM.BaseType == MSP430ISelAddressMode::RegBase) in SelectAddr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 52 using BaseKind = enum { RegBase, FrameIndexBase };
55 BaseKind Kind = RegBase;
73 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 87 using BaseKind = enum { RegBase, FrameIndexBase };
90 BaseKind Kind = RegBase;
106 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
1262 Addr.setKind(Address::RegBase); in processCallArgs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 91 RegBase, enumerator
93 } BaseType = RegBase;
858 Addr.BaseType = Address::RegBase; in ARMSimplifyAddress()
2022 Addr.BaseType = Address::RegBase; in ProcessCallArgs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 68 RegBase, enumerator
81 : BaseType(RegBase), Offset(0) { in Address()
439 Addr.BaseType = Address::RegBase; in PPCSimplifyAddress()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 83 RegBase,
88 BaseKind Kind = RegBase;
106 bool isRegBase() const { return Kind == RegBase; } in isRegBase()
1062 Addr.setKind(Address::RegBase); in simplifyAddress()
3136 Addr.setKind(Address::RegBase); in processCallArgs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 6097 Variable *RegBase = nullptr; in legalize() local
6100 RegBase = llvm::cast<Variable>( in legalize()
6118 if (Base != RegBase || Index != RegIndex) { in legalize()
6122 Mem = OperandARM32Mem::create(Func, Ty, RegBase, RegIndex, in legalize()
6126 Mem = OperandARM32Mem::create(Func, Ty, RegBase, Offset, in legalize()
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| D | IceTargetLoweringMIPS32.cpp | 5835 Variable *RegBase = nullptr; in legalize() local
5838 RegBase = llvm::cast<Variable>( in legalize()
5849 if (Base != RegBase) { in legalize()
5850 Mem = OperandMIPS32Mem::create(Func, Ty, RegBase, Offset, in legalize()
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| D | IceTargetLoweringX8664.cpp | 6621 Variable *RegBase = nullptr; in legalize() local
6625 RegBase = llvm::cast<Variable>( in legalize()
6635 if (Base != RegBase || Index != RegIndex) { in legalize()
6636 Mem = X86OperandMem::create(Func, Ty, RegBase, Offset, RegIndex, Shift, in legalize()
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| D | IceTargetLoweringX8632.cpp | 7359 Variable *RegBase = nullptr; in legalize() local
7363 RegBase = llvm::cast<Variable>( in legalize()
7373 if (Base != RegBase || Index != RegIndex) { in legalize()
7374 Mem = X86OperandMem::create(Func, Ty, RegBase, Offset, RegIndex, Shift, in legalize()
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