Searched refs:ReplaceReg (Results 1 – 3 of 3) sorted by relevance
/third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_compiler_util.c | 377 const struct rc_src_register * ReplaceReg; member 406 if (!d->ReplaceRemoved && src == d->ReplaceReg) { in can_use_presub_read_cb() 452 d.ReplaceReg = replace_reg; in rc_inst_can_use_presub()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | ModuloSchedule.cpp | 1163 unsigned ReplaceReg = 0; in rewriteScheduledInstr() local 1168 ReplaceReg = PrevReg; in rewriteScheduledInstr() 1171 ReplaceReg = PrevReg; in rewriteScheduledInstr() 1173 ReplaceReg = NewReg; in rewriteScheduledInstr() 1178 ReplaceReg = NewReg; in rewriteScheduledInstr() 1180 ReplaceReg = NewReg; in rewriteScheduledInstr() 1182 ReplaceReg = NewReg; in rewriteScheduledInstr() 1183 if (ReplaceReg) { in rewriteScheduledInstr() 1184 MRI.constrainRegClass(ReplaceReg, MRI.getRegClass(OldReg)); in rewriteScheduledInstr() 1185 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUMachineCFGStructurizer.cpp | 1116 unsigned *ReplaceReg); 1120 SmallVector<unsigned, 2> &PHIIndices, unsigned *ReplaceReg); 1449 unsigned *ReplaceReg) { in shrinkPHI() argument 1450 return shrinkPHI(PHI, 0, nullptr, PHIIndices, ReplaceReg); in shrinkPHI() 1457 unsigned *ReplaceReg) { in shrinkPHI() argument 1479 *ReplaceReg = getPHISourceReg(PHI, SingleExternalEntryIndex); in shrinkPHI() 2445 unsigned ReplaceReg; in splitLoopPHI() local 2447 if (shrinkPHI(PHI, PHIRegionIndices, &ReplaceReg)) { in splitLoopPHI() 2448 PHISource = ReplaceReg; in splitLoopPHI()
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