/third_party/FreeBSD/lib/msun/src/ |
D | e_sinhl.c | 55 S15 = 7.6470006914396920e-13, /* 0x1ae7ce4eff2792.0p-93 */ variable 69 S15 = 7.64716373181980539786802470969096440e-13L, /* 0x1ae7f3e733b814193af09ce723043.0p-153L */ variable 113 RETURNI(((S17*x2 + S15)*x4 + (S13*x2 + S11))*(x2*x*x4*x4) + in sinhl() 119 S17)*x2 + S15)*x2 + S13)*x2 + S11)*x2 + S9)*x2 + S7)*x2 + in sinhl()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMCallingConv.td | 80 S9, S10, S11, S12, S13, S14, S15]>>, 100 S9, S10, S11, S12, S13, S14, S15]>>, 226 S9, S10, S11, S12, S13, S14, S15]>>, 245 S9, S10, S11, S12, S13, S14, S15]>>,
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D | ARMCallingConv.cpp | 161 ARM::S12, ARM::S13, ARM::S14, ARM::S15 };
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D | ARMRegisterInfo.td | 107 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">; 126 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
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/third_party/openGLES/extensions/OES/ |
D | OES_fixed_point.txt | 60 S15.16 representation. New versions of commands are created 82 S15.16 form. Requiring scaling is too error prone. 212 | fixed | 32 | signed 2's complement S15.16 scaled integer| 214 | clampx | 32 | S15.16 scaled integer clamped to [0, 1] |
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/third_party/skia/third_party/externals/opengl-registry/extensions/OES/ |
D | OES_fixed_point.txt | 50 S15.16 representation. New versions of commands are created 72 S15.16 form. Requiring scaling is too error prone. 202 | fixed | 32 | signed 2's complement S15.16 scaled integer| 204 | clampx | 32 | S15.16 scaled integer clamped to [0, 1] |
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenCallingConv.inc | 298 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 555 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 764 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 917 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
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D | ARMGenRegisterInfo.inc | 120 S15 = 100, 1511 { ARM::S15 }, 1567 …, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17… 1577 …, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17… 1587 …, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17… 1637 …5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, 5903 …S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19… 5904 …, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23… 5921 …S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19… 5922 …, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23…
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D | ARMGenAsmMatcher.inc | 9106 case ARM::S15: OpKind = MCK_SPR_8; break;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 54 case AArch64::S15: in isOdd()
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D | AArch64SchedPredicates.td | 115 CheckRegOperand<0, S15>,
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D | AArch64RegisterInfo.td | 333 def S15 : AArch64Reg<15, "s15", [H15]>, DwarfRegAlias<B15>; 368 def D15 : AArch64Reg<15, "d15", [S15], ["v15", ""]>, DwarfRegAlias<B15>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenRegisterInfo.inc | 154 S15 = 134, 1506 …PPC::S22, PPC::S21, PPC::S20, PPC::S19, PPC::S18, PPC::S17, PPC::S16, PPC::S15, PPC::S14, PPC::S13… 1526 …PPC::S22, PPC::S21, PPC::S20, PPC::S19, PPC::S18, PPC::S17, PPC::S16, PPC::S15, PPC::S14, PPC::S13… 1870 { 1215U, PPC::S15 }, 2013 { 1215U, PPC::S15 }, 2158 { 1215U, PPC::S15 }, 2301 { 1215U, PPC::S15 }, 2450 { PPC::S15, 1215U }, 2725 { PPC::S15, 1215U }, 3003 { PPC::S15, 1215U }, [all …]
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D | PPCGenAsmMatcher.inc | 3773 case PPC::S15: OpKind = MCK_Reg8; break;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCTargetDesc.cpp | 146 {codeview::RegisterId::ARM64_S15, AArch64::S15}, in initLLVMToCVRegMapping()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCCallingConv.td | 304 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,
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D | PPCFrameLowering.cpp | 212 {PPC::S15, -136}, in getCalleeSavedSpillSlots()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 358 AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenRegisterInfo.inc | 188 S15 = 168, 2330 …h64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArc… 3949 { AArch64::S15, 79U }, 4228 { AArch64::S15, 79U }, 20422 …h64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArc… 20424 …h64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArc…
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D | AArch64GenSubtargetInfo.inc | 13956 || MI->getOperand(0).getReg() == AArch64::S15 14110 || MI->getOperand(0).getReg() == AArch64::S15 14264 || MI->getOperand(0).getReg() == AArch64::S15 19592 || MI->getOperand(0).getReg() == AArch64::S15 19746 || MI->getOperand(0).getReg() == AArch64::S15 19900 || MI->getOperand(0).getReg() == AArch64::S15
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D | AArch64GenAsmMatcher.inc | 11376 case AArch64::S15: OpKind = MCK_FPR32; break;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1293 ARM::S12, ARM::S13, ARM::S14, ARM::S15,
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