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Searched refs:SBase (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/harfbuzz/src/
Dhb-ot-shape-complex-hangul.cc106 #define SBase 0xAC00u macro
113 #define isCombinedS(u) (hb_in_range<hb_codepoint_t> ((u), SBase, SBase+SCount-1))
273 hb_codepoint_t s = SBase + (l - LBase) * NCount + (v - VBase) * TCount + tindex; in preprocess_text_hangul()
312 unsigned int lindex = (s - SBase) / NCount; in preprocess_text_hangul()
313 unsigned int nindex = (s - SBase) % NCount; in preprocess_text_hangul()
/third_party/python/Modules/
Dunicodedata.c488 #define SBase 0xAC00 macro
552 if (SBase <= code && code < (SBase+SCount)) { in nfd_nfkd()
553 int SIndex = code - SBase; in nfd_nfkd()
703 code = SBase + (LIndex*VCount+VIndex)*TCount; in nfc_nfkc()
1091 if (SBase <= code && code < SBase+SCount) { in _getucname()
1093 int SIndex = code - SBase; in _getucname()
1244 *code = SBase + (L*VCount+V)*TCount + T; in _getcode()
/third_party/icu/ohos_icu4j/src/main/tests/ohos/global/icu/dev/test/normalizer/
DNormalizerBuilder.java234 first = (char)(SBase + SIndex - TIndex); in buildDecompositionTables()
241 value = SIndex + SBase; in buildDecompositionTables()
252 SBase = 0xAC00, LBase = 0x1100, VBase = 0x1161, TBase = 0x11A7, field in NormalizerBuilder
/third_party/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/normalizer/
DNormalizerBuilder.java233 first = (char)(SBase + SIndex - TIndex); in buildDecompositionTables()
240 value = SIndex + SBase; in buildDecompositionTables()
251 SBase = 0xAC00, LBase = 0x1100, VBase = 0x1161, TBase = 0x11A7, field in NormalizerBuilder
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp245 bool SelectSMRD(SDValue Addr, SDValue &SBase, SDValue &Offset,
247 bool SelectSMRDImm(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
248 bool SelectSMRDImm32(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
249 bool SelectSMRDSgpr(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
1821 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase, in SelectSMRD() argument
1834 SBase = Expand32BitAddress(N0); in SelectSMRD()
1838 SBase = Expand32BitAddress(Addr); in SelectSMRD()
1844 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase, in SelectSMRDImm() argument
1847 return SelectSMRD(Addr, SBase, Offset, Imm) && Imm; in SelectSMRDImm()
1850 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase, in SelectSMRDImm32() argument
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DSIInstrInfo.cpp4269 MachineOperand *SBase = getNamedOperand(MI, AMDGPU::OpName::sbase); in legalizeOperandsSMRD() local
4270 if (SBase && !RI.isSGPRClass(MRI.getRegClass(SBase->getReg()))) { in legalizeOperandsSMRD()
4271 unsigned SGPR = readlaneVGPRToSGPR(SBase->getReg(), MI, MRI); in legalizeOperandsSMRD()
4272 SBase->setReg(SGPR); in legalizeOperandsSMRD()
/third_party/skia/third_party/externals/harfbuzz/perf/texts/
Den-words.txt9498 SBase