| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | VOPInstructions.td | 381 def SDWA {
419 // GFX9 adds two features to SDWA:
420 // 1. Add 3 fields to the SDWA microcode word: S0, S1 and OMOD.
424 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
430 // In GFX9, V_MAC_F16, V_MAC_F32 opcodes cannot be used with SDWA
432 // gfx9 SDWA basic encoding
452 // gfx9 SDWA-A
465 // gfx9 SDWA-B
492 let SDWA = 1;
497 let AsmVariantName = !if(P.HasExtSDWA, AMDGPUAsmVariants.SDWA,
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| D | SIPeepholeSDWA.cpp | 138 using namespace AMDGPU::SDWA;
393 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
400 if (DstSel == AMDGPU::SDWA::SdwaSel::WORD_1 && in convertToSDWA()
401 getSrcSel() == AMDGPU::SDWA::SdwaSel::WORD_0) { in convertToSDWA()
465 getDstSel() != AMDGPU::SDWA::DWORD) { in convertToSDWA()
1090 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1100 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD); in convertToSDWA()
1110 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1120 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD); in convertToSDWA()
1127 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) { in convertToSDWA()
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| D | SIDefines.h | 41 SDWA = 1 << 14, enumerator
230 SDWA = 2, enumerator
411 namespace SDWA {
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| D | AMDGPU.td | 314 "Support SDWA (Sub-DWORD Addressing) extension"
320 "Support OMod with SDWA (Sub-DWORD Addressing) extension"
326 "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
332 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
338 "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
344 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
917 string SDWA = "SDWA";
939 let Name = AMDGPUAsmVariants.SDWA;
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| D | SIInstrFormats.td | 34 field bit SDWA = 0;
147 let TSFlags{14} = SDWA;
207 …let hasExtraSrcRegAllocReq = !if(VOP1,1,!if(VOP2,1,!if(VOP3,1,!if(VOPC,1,!if(SDWA,1, !if(VALU,1,0)…
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| D | SIInstrInfo.td | 27 int SDWA = 2;
1455 // instructions with SDWA extension
1584 // Return type of input modifiers operand specified input operand for SDWA
1817 // Ins for SDWA
1861 // Outs for DPP and SDWA
1865 (outs), // no dst for VOPC, we use "vcc"-token as dst in SDWA VOPC instructions
1870 // Outs for SDWA
2050 // Function that checks if instruction supports DPP and SDWA
2054 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
2056 0, // 64-bit dst - No DPP or SDWA for 64-bit operands
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| D | SIInstrInfo.h | 430 return MI.getDesc().TSFlags & SIInstrFlags::SDWA; in isSDWA()
434 return get(Opcode).TSFlags & SIInstrFlags::SDWA; in isSDWA()
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| D | SIInstrInfo.cpp | 3378 DstUnused->getImm() == AMDGPU::SDWA::UNUSED_PRESERVE) { in verifyInstruction()
6319 SDWA = 2, enumerator
6376 if (get(Opcode).TSFlags & SIInstrFlags::SDWA) { in pseudoToMCOpcode()
6379 Gen = SIEncodingFamily::SDWA; in pseudoToMCOpcode()
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| D | VOP3Instructions.td | 809 // (they do not support SDWA or DPP).
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 366 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()
396 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
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| D | AMDGPUInstPrinter.cpp | 310 else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SDWA) in printVOPDst()
816 using namespace llvm::AMDGPU::SDWA; in printSDWASel()
855 using namespace llvm::AMDGPU::SDWA; in printSDWADstUnused()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.3.4.rst | 70 - aco: don't allow SDWA on VOP3P instructions
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| D | 20.1.1.rst | 157 - aco: consider SDWA during value numbering
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| D | 21.2.0.rst | 1571 - aco: refactor SDWA opcode validation
4399 - aco: allow SDWA sels smaller than the operand size
4440 - aco: disallow SDWA for instructions with 64-bit definitions/operands
4446 - aco: optimize 32-bit extracts and inserts using SDWA
4450 - aco/tests: add SDWA tests
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| D | 21.3.0.rst | 990 - aco: add more validation rules for SDWA operands
1006 - aco: rewrite SDWA selector
1008 - aco/print_ir: always print SDWA dst & src selections
4178 - aco/optimizer: Skip SDWA on v_lshlrev when unnecessary in apply_extract.
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| D | 20.3.0.rst | 4035 - aco: don't apply constant to SDWA on GFX8
4113 - aco: handle SDWA in the optimizer
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| D | 20.2.0.rst | 3811 - aco: consider SDWA during value numbering
3962 - aco: don't apply constant to SDWA on GFX8
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2665 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) ) in checkTargetMatchPredicate()
2679 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) { in checkTargetMatchPredicate()
2700 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants()
2712 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP in getMatchedVariants()
2822 SIInstrFlags::SDWA)) { in validateConstantBusLimitations()
3073 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc)) in validateMovrels()
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0) in validateLdsDirect()
3286 return (Desc.TSFlags & SIInstrFlags::SDWA) == 0 && !IsRevOpcode(Opcode); in validateLdsDirect()
6790 using namespace llvm::AMDGPU::SDWA; in parseSDWASel()
6823 using namespace llvm::AMDGPU::SDWA; in parseSDWADstUnused()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 1105 using namespace AMDGPU::SDWA; in decodeSDWASrc()
1153 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_opcodes.py | 78 SDWA = 1 << 14 variable in Format
181 if self == Format.SDWA:
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| D | aco_ir.h | 105 SDWA = 1 << 14, enumerator
292 return (Format)((uint32_t)Format::SDWA | (uint32_t)format); in asSDWA()
1336 constexpr bool isSDWA() const noexcept { return (uint16_t)format & (uint16_t)Format::SDWA; } in isSDWA()
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| D | aco_ir.cpp | 276 (Format)(((uint16_t)tmp->format & ~(uint16_t)Format::VOP3) | (uint16_t)Format::SDWA); in convert_to_SDWA()
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| D | aco_assembler.cpp | 717 instr->format = (Format)((uint16_t)instr->format & ~(uint16_t)Format::SDWA); in emit_instruction()
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| D | aco_validate.cpp | 118 base_format = (Format)((uint32_t)base_format & ~(uint32_t)Format::SDWA); in validate_ir()
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| D | aco_optimizer.cpp | 2429 new_opcode, (Format)((uint16_t)Format::SDWA | (uint16_t)Format::VOPC), 2, 1); in combine_inverse_comparison()
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