Home
last modified time | relevance | path

Searched refs:SETULE (Results 1 – 25 of 48) sorted by relevance

12

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1062 SETULE, // 1 1 0 1 True if unordered, less than, or equal enumerator
1087 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; in isUnsignedIntSetCC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp216 case FCmpInst::FCMP_ULE: return ISD::SETULE; in getFCmpCondCode()
228 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
243 case ICmpInst::ICMP_ULE: return ISD::SETULE; in getICmpCondCode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp489 case ISD::SETULE: in NegateCC()
696 SET_NEWCC(SETULE, JULE); in EmitInstrWithCustomInserter()
DBPFInstrInfo.td103 [{return (N->getZExtValue() == ISD::SETULE);}]>;
123 [{return (N->getZExtValue() == ISD::SETULE);}]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td81 defm LE_U : ComparisonInt<SETULE, "le_u", 0x4d, 0x58>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3041 case ISD::SETULE: { in get32BitZExtCompare()
3214 case ISD::SETULE: { in get32BitSExtCompare()
3373 case ISD::SETULE: { in get64BitZExtCompare()
3536 case ISD::SETULE: { in get64BitSExtCompare()
3811 case ISD::SETULE: in SelectCC()
3838 case ISD::SETULE: in SelectCC()
3873 case ISD::SETULE: in getPredicateForSetCC()
3906 case ISD::SETULE: in getCRIdxForSetCC()
3937 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break; in getVCmpInst()
3945 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
[all …]
DPPCInstrQPX.td1013 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1060 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1120 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULE)),
1141 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULE)),
1162 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULE)),
DPPCInstrInfo.td3405 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETULE)),
3711 defm : CRNotPat<(i1 (setcc i32:$s1, immZExt16:$imm, SETULE)),
3728 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETULE)),
3740 defm : CRNotPat<(i1 (setcc i64:$s1, immZExt16:$imm, SETULE)),
3757 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETULE)),
3770 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETULE)),
3786 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETULE)),
3802 defm : CRNotPat<(i1 (setcc f128:$s1, f128:$s2, SETULE)),
3886 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETULE)),
3913 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETULE)),
[all …]
DPPCInstrSPE.td854 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETULE)),
875 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETULE)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp237 case ISD::SETULE: in kill()
DAMDGPUInstructions.td262 def COND_ULE : PatFrag<(ops), (OtherVT SETULE)>;
DR600ISelLowering.cpp137 setCondCodeAction(ISD::SETULE, MVT::f32, Expand); in R600TargetLowering()
141 setCondCodeAction(ISD::SETULE, MVT::i32, Expand); in R600TargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc4336 /* 9571*/ OPC_CheckChild2CondCode, ISD::SETULE,
4354 …:[i32] }:$s1, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
4374 …:[i32] }:$s1, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
4644 /* 10413*/ OPC_CheckChild2CondCode, ISD::SETULE,
4661 …:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, i32:{ *:[i32] }:$s2, SETULE:{ *:[Other] })) - …
4680 …:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, i32:{ *:[i32] }:$s2, SETULE:{ *:[Other] })) - …
5169 /* 11800*/ OPC_CheckChild2CondCode, ISD::SETULE,
5187 …:[i64] }:$s1, (imm:{ *:[i64] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
5207 …:[i64] }:$s1, (imm:{ *:[i64] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
5478 /* 12644*/ OPC_CheckChild2CondCode, ISD::SETULE,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp376 case ISD::SETULE: in softenSetCCOperands()
2941 } else if (Cond == ISD::CondCode::SETULE) { in optimizeSetCCOfSignedTruncationCheck()
3375 case ISD::SETULE: in SimplifySetCC()
3398 case ISD::SETULE: { in SimplifySetCC()
3591 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC()
3734 Cond == ISD::SETULE || Cond == ISD::SETUGT) { in SimplifySetCC()
3735 bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT); in SimplifySetCC()
3746 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; in SimplifySetCC()
3797 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE); in SimplifySetCC()
3972 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
[all …]
DSelectionDAGDumper.cpp421 case ISD::SETULE: return "setule"; in getOperationName()
DLegalizeIntegerTypes.cpp1381 case ISD::SETULE: in PromoteSetCCOperands()
3850 case ISD::SETULE: LowCC = ISD::SETULE; break; in IntegerExpandSetCCOperands()
3884 CCCode == ISD::SETUGE || CCCode == ISD::SETULE); in IntegerExpandSetCCOperands()
3918 case ISD::SETULE: CCCode = ISD::SETUGE; FlipOperands = true; break; in IntegerExpandSetCCOperands()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc2382 /* 4251*/ OPC_CheckChild2CondCode, ISD::SETULE,
2396 …rcond (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$lhs, GPR32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }), (b…
2450 /* 4387*/ OPC_CheckChild2CondCode, ISD::SETULE,
2464 …rcond (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$lhs, GPR32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }), (b…
2515 /* 4511*/ OPC_CheckChild2CondCode, ISD::SETULE,
2528 …rcond (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$lhs, GPR32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }), (b…
2898 /* 5199*/ OPC_CheckChild2CondCode, ISD::SETULE,
2912 …rcond (setcc:{ *:[i32] } GPR64:{ *:[i64] }:$lhs, GPR64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }), (b…
4610 /* 8783*/ OPC_CheckChild2CondCode, ISD::SETULE,
4620 …32] } (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$lhs, GPR32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }), GP…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp51 case ISD::SETULE: in ISDCCtoARCCC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp961 case ISD::SETULE: in isLegalDSPCondCode()
1743 Op->getOperand(2), ISD::SETULE); in lowerINTRINSIC_WO_CHAIN()
1749 lowerMSASplatImm(Op, 2, DAG), ISD::SETULE); in lowerINTRINSIC_WO_CHAIN()
1852 Op->getOperand(2), ISD::SETULE); in lowerINTRINSIC_WO_CHAIN()
DMipsMSAInstrInfo.td148 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
149 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
174 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
175 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
176 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
177 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
DMipsDSPInstrInfo.td1429 def : DSPSetCCPat<PseudoCMPU_LE_QB, PseudoPICK_QB, v4i8, SETULE>;
1442 def : DSPSelectCCPat<PseudoCMPU_LE_QB, PseudoPICK_QB, v4i8, SETULE>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td696 def SETULE : CondCode<"FCMP_ULE", "ICMP_ULE">;
1299 (setcc node:$lhs, node:$rhs, SETULE)>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp160 ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUNE, ISD::SETGT, in RISCVTargetLowering()
354 case ISD::SETULE: in normaliseSetCC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp838 case ISD::SETULE: in IntCondCCodeToICC()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp1844 case ISD::SETULE: return ARMCC::LS; in IntCCToARMCC()
1871 case ISD::SETULE: CondCode = ARMCC::LE; break; in FPCCToARMCC()
4234 CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; in getARMCmp()
4245 case ISD::SETULE: in getARMCmp()
4248 CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; in getARMCmp()
4652 CC == ISD::SETULE || CC == ISD::SETGE || CC == ISD::SETLE) in checkVSELConstraints()
4662 if (CC == ISD::SETOLE || CC == ISD::SETULE || CC == ISD::SETOLT || in checkVSELConstraints()
4674 if (CC == ISD::SETULE || CC == ISD::SETULT || CC == ISD::SETUGE || in checkVSELConstraints()
6287 case ISD::SETULE: Invert = true; Opc = ARMCC::GT; break; in LowerVSETCC()
6332 case ISD::SETULE: Swap = true; LLVM_FALLTHROUGH; in LowerVSETCC()

12