/third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
D | sha512-s390x.pl | 86 $SHR="srlg"; # logical right shift [see even at the end] 100 $SHR="srl"; # logical right shift 158 $SHR $T1,$sigma0[2] 163 $SHR $t1,$sigma1[2]
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D | sha512-ppc.pl | 88 $SHR="srdi"; 100 $SHR="srwi"; 181 $SHR $a1,@X[($i+1)%16],$sigma0[2] 183 $SHR $t1,@X[($i+14)%16],$sigma1[2]
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/third_party/openssl/crypto/sha/asm/ |
D | sha512-s390x.pl | 86 $SHR="srlg"; # logical right shift [see even at the end] 100 $SHR="srl"; # logical right shift 158 $SHR $T1,$sigma0[2] 163 $SHR $t1,$sigma1[2]
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D | sha512-ppc.pl | 88 $SHR="srdi"; 100 $SHR="srwi"; 181 $SHR $a1,@X[($i+1)%16],$sigma0[2] 183 $SHR $t1,@X[($i+14)%16],$sigma1[2]
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/third_party/FreeBSD/sys/crypto/sha2/ |
D | sha256c.c | 104 #define SHR(x, n) (x >> n) macro 108 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3)) 109 #define s1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
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/third_party/ffmpeg/libavcodec/ |
D | mpegaudiodsp_template.c | 50 #define SHR(a,b) ((a)*(1.0f/(1<<(b)))) macro 70 # define SHR(a,b) (((int)(a))>>(b)) macro 292 t3 = in1[2*0] + SHR(in1[2*6],1); in imdct36() 294 tmp1[ 6] = t1 - SHR(t2,1); in imdct36()
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D | mpegaudiodec_float.c | 29 #define SHR(a,b) ((a)*(1.0f/(1<<(b)))) macro
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D | mpegaudiodec_fixed.c | 28 #define SHR(a,b) (((int)(a))>>(b)) macro
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/third_party/node/deps/v8/src/parsing/ |
D | token.h | 42 E(T, SHR, ">>>", 11) \ 311 return base::IsInRange(op, BIT_OR, SHR) || op == BIT_NOT; in IsBitOp() 319 static bool IsShiftOp(Value op) { return base::IsInRange(op, SHL, SHR); } in IsShiftOp()
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D | scanner-inl.h | 401 if (c0_ == '>') return Select('=', Token::ASSIGN_SHR, Token::SHR); in ScanSingleToken()
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/third_party/node/deps/openssl/openssl/crypto/bn/asm/ |
D | ppc.pl | 127 $SHR= "srw"; # unsigned shift right 151 $SHR= "srd"; # unsigned shift right 1653 $SHR. r9,r3,r8 #are there any bits above r8'th? 1663 $SHR r8,r4,r8 # r8 = (l >> BN_BITS2 -i)
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/third_party/openssl/crypto/bn/asm/ |
D | ppc.pl | 127 $SHR= "srw"; # unsigned shift right 151 $SHR= "srd"; # unsigned shift right 1653 $SHR. r9,r3,r8 #are there any bits above r8'th? 1663 $SHR r8,r4,r8 # r8 = (l >> BN_BITS2 -i)
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/third_party/skia/src/sksl/lex/ |
D | sksl.lex | 65 SHR = ">>"
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/third_party/mbedtls/library/ |
D | sha256.c | 422 #define SHR(x, n) (((x) & 0xFFFFFFFF) >> (n)) macro 423 #define ROTR(x, n) (SHR(x, n) | ((x) << (32 - (n)))) 425 #define S0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3)) 426 #define S1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
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D | sha512.c | 608 #define SHR(x, n) ((x) >> (n)) in mbedtls_internal_sha512_process_c() macro 609 #define ROTR(x, n) (SHR((x), (n)) | ((x) << (64 - (n)))) in mbedtls_internal_sha512_process_c() 611 #define S0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7)) in mbedtls_internal_sha512_process_c() 612 #define S1(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHR(x, 6)) in mbedtls_internal_sha512_process_c()
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/third_party/node/deps/v8/src/asmjs/ |
D | asm-names.h | 94 V(">>>", SHR) \
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/third_party/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_qpu.h | 204 A_ALU2(SHR)
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D | vc4_qpu_emit.c | 269 A(SHR), in vc4_generate_code_block()
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_vec4_visitor.cpp | 176 ALU2(SHR) in ALU1() 464 emit(SHR(tmp_dst, src0, brw_imm_ud(16u))); in emit_unpack_half_2x16() 483 emit(SHR(shifted, src0, src_reg(shift))); in emit_unpack_unorm_4x8() 505 emit(SHR(shifted, src0, src_reg(shift))); in emit_unpack_snorm_4x8()
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D | brw_vec4_gs_visitor.cpp | 325 emit(SHR(dst_reg(dword_index), prev_count, in emit_control_data_bits() 343 emit(SHR(dst_reg(per_slot_offset), dword_index, brw_imm_ud(2u))); in emit_control_data_bits()
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D | brw_vec4.h | 205 EMIT2(SHR)
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D | brw_vec4_builder.h | 435 ALU2(SHR) in ALU2_ACC()
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D | brw_fs_visitor.cpp | 382 bld.SHR(half_int_pixel_offset_x, suboffset(r1_0, 0), brw_imm_ud(1)); in emit_interpolation_setup_gfx6() 383 bld.SHR(half_int_pixel_offset_y, suboffset(r1_0, 1), brw_imm_ud(1)); in emit_interpolation_setup_gfx6()
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D | brw_mesh.cpp | 992 bld8.SHR(off, off, brw_imm_ud(2)); in emit_urb_indirect_writes() 1100 bld8.SHR(off, off, brw_imm_ud(2)); in emit_urb_indirect_reads()
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/third_party/mesa3d/src/intel/tools/ |
D | i965_lex.l | 127 shr { yylval.integer = BRW_OPCODE_SHR; return SHR; }
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