| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeRISCV_64.c | 76 FAIL_IF(push_inst(compiler, SLLI | RD(dst_r) | RS1(dst_r) | IMM_I(12))); in load_immediate()
125 FAIL_IF(push_inst(compiler, SLLI | RD(tmp_r) | RS1(tmp_r) | IMM_I((high & 0x1000) ? 20 : 32))); in load_immediate()
147 FAIL_IF(push_inst(compiler, SLLI | RD(TMP_REG3) | RS1(TMP_REG3) | IMM_I(32))); in emit_const()
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| D | sljitNativeRISCV_common.c | 124 #define SLLI (IMM_I(0x0) | F3(0x1) | OPC(0x13)) macro
339 inst[2] = SLLI | RD(reg) | RS1(reg) | IMM_I(12); in load_addr_to_reg()
360 inst[2] = SLLI | RD(TMP_REG3) | RS1(TMP_REG3) | IMM_I((flags & PATCH_ABS52) ? 20 : 32); in load_addr_to_reg()
944 FAIL_IF(push_inst(compiler, SLLI | RD(TMP_REG3) | RS1(OFFS_REG(arg)) | IMM_I(argw))); in getput_arg()
1008 FAIL_IF(push_inst(compiler, SLLI | RD(tmp_r) | RS1(OFFS_REG(arg)) | IMM_I(argw))); in emit_op_mem()
1130 FAIL_IF(push_inst(compiler, SLLI | WORD | RD(dst) | RS1(src2) | IMM_EXTEND(24))); in emit_single_op()
1139 FAIL_IF(push_inst(compiler, SLLI | WORD | RD(dst) | RS1(src2) | IMM_EXTEND(16))); in emit_single_op()
1148 FAIL_IF(push_inst(compiler, SLLI | WORD | RD(dst) | RS1(src2) | IMM_EXTEND(16))); in emit_single_op()
1158 FAIL_IF(push_inst(compiler, SLLI | RD(dst) | RS1(src2) | IMM_I(32))); in emit_single_op()
1450 EMIT_SHIFT(SLLI, SLL); in emit_single_op()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
| D | RISCVMatInt.cpp | 73 Res.push_back(Inst(RISCV::SLLI, ShiftAmount)); in generateInstSeq()
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | constants-loong64.h | 329 SLLI = 0x10U << 18, enumerator
1058 case SLLI: in InstructionType()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 228 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SLLI), SPReg) in emitPrologue()
|
| D | RISCVInstrInfo.td | 422 def SLLI : Shift_ri<0, 0b001, "slli">;
714 (SLLI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt)>;
804 def : PatGprUimmLog2XLen<shl, SLLI>;
1066 def : Pat<(and GPR:$rs1, 0xffffffff), (SRLI (SLLI GPR:$rs1, 32), 32)>;
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| D | RISCVInstrInfoC.td | 866 def : CompressPat<(SLLI GPRNoX0:$rs1, GPRNoX0:$rs1, uimmlog2xlennonzero:$imm),
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| /third_party/node/deps/v8/src/diagnostics/loong64/ |
| D | disasm-loong64.cc | 994 case SLLI: in DecodeTypekOp14()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | constants-mips.h | 968 SLLI = ((0U << 23) + 9), enumerator
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| D | assembler-mips.cc | 3425 V(slli, SLLI) \
|
| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | constants-mips64.h | 1017 SLLI = ((0U << 23) + 9), enumerator
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| D | assembler-mips64.cc | 3641 V(slli, SLLI) \
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 440 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
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| D | MipsScheduleGeneric.td | 1559 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(SLL|SLLI)_[BHWD]$")>;
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| /third_party/node/deps/v8/src/diagnostics/mips/ |
| D | disasm-mips.cc | 2156 case SLLI: in DecodeTypeMsaBIT()
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| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| D | disasm-mips64.cc | 2443 case SLLI: in DecodeTypeMsaBIT()
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| /third_party/node/deps/v8/src/execution/loong64/ |
| D | simulator-loong64.cc | 3354 case SLLI: { in DecodeTypeOp14()
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| /third_party/node/deps/v8/src/execution/mips/ |
| D | simulator-mips.cc | 4700 case SLLI: in MsaBitInstrHelper()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| D | simulator-mips64.cc | 4987 case SLLI: in MsaBitInstrHelper()
|