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/third_party/ffmpeg/tests/ref/fate/
Dfilter-formats19 3 channels (FC+SL+SR)
20 4 channels (FC+LFE+SL+SR)
22 5 channels (FL+FR+LFE+SL+SR)
25 5 channels (FC+BL+BR+SL+SR)
26 6 channels (FC+LFE+BL+BR+SL+SR)
27 6 channels (FL+FR+BL+BR+SL+SR)
28 7 channels (FL+FR+LFE+BL+BR+SL+SR)
31 4 channels (FC+BC+SL+SR)
32 5 channels (FC+LFE+BC+SL+SR)
33 5 channels (FL+FR+BC+SL+SR)
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DRenameIndependentSubregs.cpp69 LiveInterval::SubRange *SR; member
72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, in SubRangeInfo()
74 : ConEQ(LIS), SR(&SR), Index(Index) {} in SubRangeInfo()
161 for (LiveInterval::SubRange &SR : LI.subranges()) { in findComponents()
162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); in findComponents()
165 unsigned NumSubComponents = ConEQ.Classify(SR); in findComponents()
186 const LiveInterval::SubRange &SR = *SRInfo.SR; in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
192 const VNInfo *VNI = SR.getVNInfoAt(Pos); in findComponents()
231 const LiveInterval::SubRange &SR = *SRInfo.SR; in rewriteOperands() local
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DVirtRegMap.cpp277 for (const LiveInterval::SubRange &SR : LI.subranges()) { in addLiveInsForSubRanges() local
278 SubRanges.push_back(std::make_pair(&SR, SR.begin())); in addLiveInsForSubRanges()
279 if (!First.isValid() || SR.segments.front().start < First) in addLiveInsForSubRanges()
280 First = SR.segments.front().start; in addLiveInsForSubRanges()
281 if (!Last.isValid() || SR.segments.back().end > Last) in addLiveInsForSubRanges()
282 Last = SR.segments.back().end; in addLiveInsForSubRanges()
294 const LiveInterval::SubRange *SR = RangeIterPair.first; in addLiveInsForSubRanges() local
296 while (SRI != SR->end() && SRI->end <= MBBBegin) in addLiveInsForSubRanges()
298 if (SRI == SR->end()) in addLiveInsForSubRanges()
301 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
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DLiveInterval.cpp883 static void stripValuesNotDefiningMask(unsigned Reg, LiveInterval::SubRange &SR, in stripValuesNotDefiningMask() argument
894 for (VNInfo *VNI : SR.valnos) { in stripValuesNotDefiningMask()
924 SR.removeValNo(VNI); in stripValuesNotDefiningMask()
936 for (SubRange &SR : subranges()) { in refineSubRanges()
937 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
945 MatchingRange = &SR; in refineSubRanges()
949 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
951 MatchingRange = createSubRangeFrom(Allocator, Matching, SR); in refineSubRanges()
956 stripValuesNotDefiningMask(reg, SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
1049 for (const SubRange &SR : subranges()) in print() local
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DDeadMachineInstructionElim.cpp158 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local
159 SR.isValid(); ++SR) in runOnMachineFunction()
160 LivePhysRegs.reset(*SR); in runOnMachineFunction()
DRegUsageInfoCollector.cpp212 for (MCSubRegIterator SR(Reg, &TRI); SR.isValid(); ++SR) in computeCalleeSavedRegs() local
213 SavedRegs.set(*SR); in computeCalleeSavedRegs()
DRegisterCoalescer.cpp972 &ShrinkB](LiveInterval::SubRange &SR) { in removeCopyByCommutingDef() argument
973 VNInfo *BSubValNo = SR.empty() ? SR.getNextValue(CopyIdx, Allocator) in removeCopyByCommutingDef()
974 : SR.getVNInfoAt(CopyIdx); in removeCopyByCommutingDef()
976 auto P = addSegmentsWithValNo(SR, BSubValNo, SA, ASubValNo); in removeCopyByCommutingDef()
1158 for (LiveInterval::SubRange &SR : IntB.subranges()) in removePartialRedundancy()
1159 SR.createDeadDef(NewCopyIdx, LIS->getVNInfoAllocator()); in removePartialRedundancy()
1187 for (LiveInterval::SubRange &SR : IntB.subranges()) { in removePartialRedundancy()
1189 VNInfo *BValNo = SR.Query(CopyIdx).valueOutOrDead(); in removePartialRedundancy()
1191 LIS->pruneValue(SR, CopyIdx.getRegSlot(), &EndPoints); in removePartialRedundancy()
1207 LIS->extendToIndices(SR, EndPoints); in removePartialRedundancy()
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DLiveIntervals.cpp377 for (const LiveInterval::SubRange &SR : I.subranges()) { in extendSegmentsToUses() local
378 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
379 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
380 return SR; in extendSegmentsToUses()
553 void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg) { in shrinkToUses() argument
554 LLVM_DEBUG(dbgs() << "Shrink: " << SR << '\n'); in shrinkToUses()
570 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
580 LiveQueryResult LRQ = SR.Query(Idx); in shrinkToUses()
597 createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end())); in shrinkToUses()
598 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
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DTargetRegisterInfo.cpp71 for (MCSuperRegIterator SR(Reg, this); SR.isValid(); ++SR) { in checkAllSuperRegsMarked() local
72 if (!RegisterSet[*SR] && !is_contained(Exceptions, Reg)) { in checkAllSuperRegsMarked()
73 dbgs() << "Error: Super register " << printReg(*SR, this) in checkAllSuperRegsMarked()
81 Checked.set(*SR); in checkAllSuperRegsMarked()
/third_party/elfutils/backends/
Di386_corenote.c47 #define SR(at, n, dwreg) \ macro
55 SR (7, 1, 43), /* %ds */
56 SR (8, 1, 40), /* %es */
57 SR (9, 1, 44), /* %fs */
58 SR (10, 1, 45), /* %gs */
61 SR (13, 1, 41), /* %cs */
64 SR (16, 1, 42), /* %ss */
67 #undef SR
Dx86_64_corenote.c54 #define SR(at, n, dwreg) \ macro
73 SR (17,1, 51), /* %cs */
76 SR (20,1, 52), /* %ss */
78 SR (23,1, 53), /* %ds */
79 SR (24,1, 50), /* %es */
80 SR (25,2, 54), /* %fs-%gs */
83 #undef SR
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td172 // sub / add which can clobber SR.
173 let isCodeGenOnly = 1, Defs = [SP, SR], Uses = [SP] in {
182 let isCodeGenOnly = 1, Defs = [SR], Uses = [SP] in {
188 let Uses = [SR] in {
198 let Defs = [SR] in {
268 let Uses = [SR] in
282 Defs = [R11, R12, R13, R14, R15, SR],
448 let Defs = [SR], Uses = uses in {
454 (implicit SR)]>;
458 (implicit SR)]>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/
DRecordSerialization.cpp107 BinaryStreamReader SR(S); in consume() local
108 auto EC = consume(SR, Num); in consume()
109 Data = Data.take_back(SR.bytesRemaining()); in consume()
133 BinaryStreamReader SR(S); in consume() local
134 auto EC = consume(SR, Item); in consume()
135 Data = Data.take_back(SR.bytesRemaining()); in consume()
DStringsAndChecksums.cpp33 const DebugSubsectionRecord &SR) { in initializeStrings() argument
34 assert(SR.kind() == DebugSubsectionKind::StringTable); in initializeStrings()
38 consumeError(OwnedStrings->initialize(SR.getRecordData())); in initializeStrings()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DRDFCopy.cpp149 RegisterRef SR = FR->second; in run() local
150 if (DR == SR) in run()
153 NodeId AtCopy = getLocalReachingDef(SR, SA); in run()
166 NodeId AtUse = getLocalReachingDef(SR, IA); in run()
175 << " with " << Print<RegisterRef>(SR, DFG) << " in " in run()
179 unsigned NewReg = MinPhysReg(SR); in run()
204 J.second = SR; in run()
DHexagonGenExtract.cpp165 uint32_t SR = CSR->getZExtValue(); in INITIALIZE_PASS_DEPENDENCY() local
172 if (!LogicalSR && (SR > SL)) in INITIALIZE_PASS_DEPENDENCY()
174 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY()
185 uint32_t U = BW - std::max(SL, SR); in INITIALIZE_PASS_DEPENDENCY()
216 Value *NewIn = IRB.CreateCall(ExtF, {BF, IRB.getInt32(W), IRB.getInt32(SR)}); in INITIALIZE_PASS_DEPENDENCY()
DHexagonFrameLowering.cpp1477 for (MCSubRegIterator SR(R, TRI, true); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1478 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1489 for (MCSuperRegIterator SR(R, TRI, true); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1490 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1504 for (MCSuperRegIterator SR(R, TRI); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1505 TmpSup[*SR] = true; in assignCalleeSavedSpillSlots()
1509 for (MCSubRegIterator SR(R, TRI, true); SR.isValid(); ++SR) { in assignCalleeSavedSpillSlots() local
1510 if (!Reserved[*SR]) in assignCalleeSavedSpillSlots()
1528 for (MCSuperRegIterator SR(R, TRI); SR.isValid(); ++SR) { in assignCalleeSavedSpillSlots() local
1529 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFMIChecking.cpp149 for (MCSuperRegIterator SR(I, TRI); SR.isValid(); ++SR) in hasLiveDefs() local
150 if (std::find(search_begin, search_end, *SR) == search_end) in hasLiveDefs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/
DDwarfExpression.cpp119 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg() local
120 Reg = TRI.getDwarfRegNum(*SR, false); in addMachineReg()
122 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in addMachineReg()
144 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg() local
145 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in addMachineReg()
148 Reg = TRI.getDwarfRegNum(*SR, false); in addMachineReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/
DEntryStage.cpp35 SourceRef SR = SM.peekNext(); in getNextInstruction() local
36 std::unique_ptr<Instruction> Inst = std::make_unique<Instruction>(SR.second); in getNextInstruction()
37 CurrentInstruction = InstRef(SR.first, Inst.get()); in getNextInstruction()
/third_party/typescript/tests/baselines/reference/
DawaitedTypeJQuery.types10 SR, SJ, SN> {
12 …SR[]) => PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, CJD, CND, RRD, RJD, RND> | Thenable<ARD> |…
25 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
26 >doneFilter : (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, C…
30 >s : SR[]
59 …SR[]) => ARD | PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, CJD, CND, RRD, RJD, RND> | Thenable<…
96 …SR[]) => ARD | PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, CJD, CND, RRD, RJD, RND> | Thenable<…
123 …SR[]) => ARD | PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, CJD, CND, RRD, RJD, RND> | Thenable<…
132 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
133 >doneFilter : (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND, BRD, BJD, BND, CRD, C…
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DawaitedTypeJQuery.js10 SR, SJ, SN> {
23 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
79 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
108 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/PDB/Native/
DNativeTypeVTShape.cpp9 codeview::VFTableShapeRecord SR) in NativeTypeVTShape() argument
11 Record(std::move(SR)) {} in NativeTypeVTShape()
/third_party/typescript/tests/cases/compiler/
DawaitedTypeJQuery.ts9 SR, SJ, SN> {
22 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
78 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
107 doneFilter: (t: TR, u: UR, v: VR, ...s: SR[]) => PromiseBase<ARD, AJD, AND,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/MCTargetDesc/
DMSP430InstPrinter.cpp81 if (Base.getReg() == MSP430::SR) in printSrcMemOperand()
92 if ((Base.getReg() != MSP430::SR) && in printSrcMemOperand()

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