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Searched refs:SRA_W (Results 1 – 14 of 14) sorted by relevance

/third_party/node/deps/v8/src/codegen/loong64/
Dconstants-loong64.h350 SRA_W = 0x30U << 15, enumerator
1088 case SRA_W: in InstructionType()
Dassembler-loong64.cc1219 GenRegister(SRA_W, rk, rj, rd); in sra_w()
/third_party/node/deps/v8/src/diagnostics/loong64/
Ddisasm-loong64.cc1073 case SRA_W: in DecodeTypekOp17()
/third_party/pcre2/pcre2/src/sljit/
DsljitNativeMIPS_common.c307 #define SRA_W SRA macro
315 #define SRA_W DSRA macro
3507 FAIL_IF(push_inst(compiler, SRA_W | T(reg) | D(TMP_REG2) | SH_IMM(8), DR(TMP_REG2))); in sljit_emit_mem()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc2519 UINT64_C(2025848845), // SRA_W
8800 case Mips::SRA_W:
11981 CEFBS_HasStdEnc_HasMSA, // SRA_W = 2506
DMipsGenAsmWriter.inc3747 268459998U, // SRA_W
6501 0U, // SRA_W
DMipsGenFastISel.inc2211 return fastEmitInst_rr(Mips::SRA_W, &Mips::MSA128WRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenGlobalISel.inc14893 …{ *:[i32] })<<P:Predicate_immi32Cst31>>), v4i32:{ *:[v4i32] }:$wt)) => (SRA_W:{ *:[v4i32] } v4i3…
14894 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SRA_W,
14942 …cate_immi32Cst31>>, (imm:{ *:[i32] })<<P:Predicate_immi32Cst31>>))) => (SRA_W:{ *:[v4i32] } v4i3…
14943 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::SRA_W,
14956 …32] } MSA128WOpnd:{ *:[v4i32] }:$ws, MSA128WOpnd:{ *:[v4i32] }:$wt) => (SRA_W:{ *:[v4i32] } MSA1…
14957 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::SRA_W,
DMipsGenDAGISel.inc21122 /* 39414*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SRA_W), 0,
21125 // Dst: (SRA_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$ws, v4i32:{ *:[v4i32] }:$wt)
21155 /* 39472*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SRA_W), 0,
21158 // Dst: (SRA_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$ws, v4i32:{ *:[v4i32] }:$wt)
21238 /* 39624*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SRA_W), 0,
21241 … // Dst: (SRA_W:{ *:[v4i32] } MSA128WOpnd:{ *:[v4i32] }:$ws, MSA128WOpnd:{ *:[v4i32] }:$wt)
DMipsGenInstrInfo.inc2521 SRA_W = 2506,
7367 …06, 3, 1, 4, 616, 0, 0x6ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #2506 = SRA_W
DMipsGenDisassemblerTables.inc4248 /* 7136 */ MCD::OPC_Decode, 202, 19, 255, 1, // Opcode: SRA_W
DMipsGenAsmMatcher.inc7776 …{ 8588 /* sra.w */, Mips::SRA_W, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, AMFBS…
/third_party/node/deps/v8/src/execution/loong64/
Dsimulator-loong64.cc3545 case SRA_W: in DecodeTypeOp17()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3465 def SRA_W : SRA_W_ENC, SRA_W_DESC;